DE3854278T2 - Aus einer Vielzahl von Eintransistorspeicherzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff. - Google Patents

Aus einer Vielzahl von Eintransistorspeicherzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff.

Info

Publication number
DE3854278T2
DE3854278T2 DE3854278T DE3854278T DE3854278T2 DE 3854278 T2 DE3854278 T2 DE 3854278T2 DE 3854278 T DE3854278 T DE 3854278T DE 3854278 T DE3854278 T DE 3854278T DE 3854278 T2 DE3854278 T2 DE 3854278T2
Authority
DE
Germany
Prior art keywords
random access
dynamic random
device composed
single transistor
memory device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3854278T
Other languages
English (en)
Other versions
DE3854278D1 (de
Inventor
Yasushi C O Nec Corpor Okuyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE3854278D1 publication Critical patent/DE3854278D1/de
Application granted granted Critical
Publication of DE3854278T2 publication Critical patent/DE3854278T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/37—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells the capacitor being at least partially in a trench in the substrate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/92—Capacitors having potential barriers
    • H01L29/94—Metal-insulator-semiconductors, e.g. MOS
    • H01L29/945—Trench capacitors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Semiconductor Memories (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE3854278T 1987-04-13 1988-04-13 Aus einer Vielzahl von Eintransistorspeicherzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff. Expired - Lifetime DE3854278T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9116787 1987-04-13

Publications (2)

Publication Number Publication Date
DE3854278D1 DE3854278D1 (de) 1995-09-14
DE3854278T2 true DE3854278T2 (de) 1996-03-21

Family

ID=14018919

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3854278T Expired - Lifetime DE3854278T2 (de) 1987-04-13 1988-04-13 Aus einer Vielzahl von Eintransistorspeicherzellen bestehende dynamische Speichervorrichtung mit wahlfreiem Zugriff.

Country Status (5)

Country Link
US (1) US4918503A (de)
EP (1) EP0287056B1 (de)
JP (1) JPS6427252A (de)
KR (1) KR910002814B1 (de)
DE (1) DE3854278T2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02177359A (ja) * 1988-12-27 1990-07-10 Nec Corp 半導体記憶装置
US5334547A (en) * 1988-12-27 1994-08-02 Nec Corporation Method of manufacturing a semiconductor memory having an increased cell capacitance in a restricted cell area
JP2503621B2 (ja) * 1989-01-23 1996-06-05 日本電気株式会社 半導体装置の製造方法
EP0399060B1 (de) * 1989-05-22 1995-05-24 Siemens Aktiengesellschaft Halbleiterspeicheranordnung mit Kondensatoren mir zwei in einem Graben angeordneten Elektroden und Verfahren zu deren Herstellung
US4954854A (en) * 1989-05-22 1990-09-04 International Business Machines Corporation Cross-point lightly-doped drain-source trench transistor and fabrication process therefor
US5701022A (en) * 1989-05-22 1997-12-23 Siemens Aktiengesellschaft Semiconductor memory device with trench capacitor
KR910013554A (ko) * 1989-12-08 1991-08-08 김광호 반도체 장치 및 그 제조방법
US5075817A (en) * 1990-06-22 1991-12-24 Ramtron Corporation Trench capacitor for large scale integrated memory
US5104822A (en) * 1990-07-30 1992-04-14 Ramtron Corporation Method for creating self-aligned, non-patterned contact areas and stacked capacitors using the method
US5191509A (en) * 1991-12-11 1993-03-02 International Business Machines Corporation Textured polysilicon stacked trench capacitor
JP3480745B2 (ja) * 1993-09-16 2003-12-22 株式会社東芝 半導体装置の製造方法
JP3400846B2 (ja) * 1994-01-20 2003-04-28 三菱電機株式会社 トレンチ構造を有する半導体装置およびその製造方法
US5717628A (en) * 1996-03-04 1998-02-10 Siemens Aktiengesellschaft Nitride cap formation in a DRAM trench capacitor
US5757059A (en) * 1996-07-30 1998-05-26 International Business Machines Corporation Insulated gate field effect transistor
US5721448A (en) * 1996-07-30 1998-02-24 International Business Machines Corporation Integrated circuit chip having isolation trenches composed of a dielectric layer with oxidation catalyst material
KR100236531B1 (ko) * 1996-11-06 2000-01-15 윤종용 박막 커패시터 제조방법
US6025224A (en) * 1997-03-31 2000-02-15 Siemens Aktiengesellschaft Device with asymmetrical channel dopant profile
JP3976374B2 (ja) 1997-07-11 2007-09-19 三菱電機株式会社 トレンチｍｏｓゲート構造を有する半導体装置及びその製造方法
JP3705919B2 (ja) * 1998-03-05 2005-10-12 三菱電機株式会社 半導体装置及びその製造方法
US6740555B1 (en) * 1999-09-29 2004-05-25 Infineon Technologies Ag Semiconductor structures and manufacturing methods
US7115469B1 (en) 2001-12-17 2006-10-03 Spansion, Llc Integrated ONO processing for semiconductor devices using in-situ steam generation (ISSG) process
KR100890022B1 (ko) 2002-07-19 2009-03-25 삼성전자주식회사 액정 표시 장치 및 그 구동 방법
US6984860B2 (en) * 2002-11-27 2006-01-10 Semiconductor Components Industries, L.L.C. Semiconductor device with high frequency parallel plate trench capacitor structure
EP1670064A1 (de) * 2004-12-13 2006-06-14 Infineon Technologies AG Monolithisch integrierter Kondensator und dessen Herstellungsmethode
TWI514428B (zh) * 2008-01-29 2015-12-21 Nanya Technology Corp 用於升壓電路中之電容結構與電容結構之形成方法
CN101515601B (zh) * 2008-02-18 2012-07-25 南亚科技股份有限公司 一种用于升压电路的电容结构及其形成方法
JP3197990U (ja) * 2015-03-31 2015-06-11 セイコーエプソン株式会社 電気光学装置、及び電子機器
DE112019003024T5 (de) 2018-06-15 2021-03-18 Murata Manufacturing Co., Ltd. Kondensator und verfahren zu dessen herstellung

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6054472A (ja) * 1983-09-05 1985-03-28 Nec Corp 半導体記憶装置およびその製造方法
JPS60152059A (ja) * 1984-01-20 1985-08-10 Toshiba Corp 半導体記憶装置
JPS61148864A (ja) * 1984-12-24 1986-07-07 Hitachi Ltd 半導体記憶装置の製造方法
DE3681490D1 (de) * 1985-04-01 1991-10-24 Nec Corp Dynamische speicheranordnung mit wahlfreiem zugriff mit einer vielzahl von eintransistorspeicherzellen.
US4801989A (en) * 1986-02-20 1989-01-31 Fujitsu Limited Dynamic random access memory having trench capacitor with polysilicon lined lower electrode
JPS62219661A (ja) * 1986-03-20 1987-09-26 Matsushita Electric Ind Co Ltd 半導体集積回路装置

Also Published As

Publication number Publication date
EP0287056A2 (de) 1988-10-19
DE3854278D1 (de) 1995-09-14
US4918503A (en) 1990-04-17
EP0287056B1 (de) 1995-08-09
EP0287056A3 (en) 1989-06-14
JPS6427252A (en) 1989-01-30
KR880013252A (ko) 1988-11-30
KR910002814B1 (ko) 1991-05-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKIO/TOKYO, JP

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: ELPIDA MEMORY, INC., TOKYO, JP