DE3852124D1 - Verfahren zum Herstellen einer Halbleiteranordnung vom harzumhüllten Typ. - Google Patents

Verfahren zum Herstellen einer Halbleiteranordnung vom harzumhüllten Typ.

Info

Publication number
DE3852124D1
DE3852124D1 DE3852124T DE3852124T DE3852124D1 DE 3852124 D1 DE3852124 D1 DE 3852124D1 DE 3852124 T DE3852124 T DE 3852124T DE 3852124 T DE3852124 T DE 3852124T DE 3852124 D1 DE3852124 D1 DE 3852124D1
Authority
DE
Germany
Prior art keywords
resin
manufacturing
semiconductor device
type semiconductor
coated type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3852124T
Other languages
English (en)
Other versions
DE3852124T2 (de
Inventor
Sadaki C O Patent Divis Hosomi
Kenji C O Patent Divi Unetsubo
Yoshiaki C O Patent Div Tatumi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE3852124D1 publication Critical patent/DE3852124D1/de
Application granted granted Critical
Publication of DE3852124T2 publication Critical patent/DE3852124T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49503—Lead-frames or other flat leads characterised by the die pad
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49568—Lead-frames or other flat leads specifically adapted to facilitate heat dissipation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909—Post-treatment of the connector or wire bonding area
    • H01L2224/8592—Applying permanent coating, e.g. protective coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
DE3852124T 1987-09-17 1988-09-16 Verfahren zum Herstellen einer Halbleiteranordnung vom harzumhüllten Typ. Expired - Fee Related DE3852124T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62232945A JPH0815165B2 (ja) 1987-09-17 1987-09-17 樹脂絶縁型半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE3852124D1 true DE3852124D1 (de) 1994-12-22
DE3852124T2 DE3852124T2 (de) 1995-03-23

Family

ID=16947315

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3852124T Expired - Fee Related DE3852124T2 (de) 1987-09-17 1988-09-16 Verfahren zum Herstellen einer Halbleiteranordnung vom harzumhüllten Typ.

Country Status (5)

Country Link
US (1) US5038200A (de)
EP (1) EP0307946B1 (de)
JP (1) JPH0815165B2 (de)
KR (1) KR910009419B1 (de)
DE (1) DE3852124T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5309027A (en) * 1992-06-15 1994-05-03 Motorola, Inc. Encapsulated semiconductor package having protectant circular insulators
DE9311223U1 (de) * 1993-07-27 1993-09-09 Siemens AG, 80333 München Mikrosensor mit Steckeranschluß
TW270213B (de) * 1993-12-08 1996-02-11 Matsushita Electric Ind Co Ltd
US5886400A (en) * 1995-08-31 1999-03-23 Motorola, Inc. Semiconductor device having an insulating layer and method for making
JP3344684B2 (ja) * 1996-05-20 2002-11-11 株式会社村田製作所 電子部品
US6476481B2 (en) * 1998-05-05 2002-11-05 International Rectifier Corporation High current capacity semiconductor device package and lead frame with large area connection posts and modified outline
JP3833464B2 (ja) * 2000-11-01 2006-10-11 株式会社三井ハイテック リードフレーム
US7466016B2 (en) * 2007-04-07 2008-12-16 Kevin Yang Bent lead transistor
EP2051298B1 (de) * 2007-10-18 2012-09-19 Sencio B.V. Gehäuse mit integrierter Schaltung
US7839004B2 (en) * 2008-07-30 2010-11-23 Sanyo Electric Co., Ltd. Semiconductor device, semiconductor module, method for manufacturing semiconductor device, and lead frame
JP2010103411A (ja) * 2008-10-27 2010-05-06 Shindengen Electric Mfg Co Ltd 半導体装置及びその製造方法
TWI425907B (zh) * 2010-09-21 2014-02-01 Delta Electronics Inc 電子元件和散熱裝置之組合結構及其絕緣元件
CN104247012B (zh) * 2012-10-01 2017-08-25 富士电机株式会社 半导体装置及其制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5946052A (ja) * 1982-09-08 1984-03-15 Nec Corp 樹脂封止絶縁型半導体装置
JPS59130449A (ja) * 1983-01-17 1984-07-27 Nec Corp 絶縁型半導体素子用リードフレーム
JPS6132434A (ja) * 1984-07-24 1986-02-15 Sanken Electric Co Ltd 樹脂封止型半導体装置の製造方法
JPS6163849U (de) * 1984-09-29 1986-04-30
JPS6191937A (ja) * 1984-10-12 1986-05-10 Sanken Electric Co Ltd 樹脂封止型半導体装置の製造方法
JPS61208242A (ja) * 1985-03-13 1986-09-16 Hitachi Ltd 半導体装置

Also Published As

Publication number Publication date
EP0307946A3 (en) 1989-07-05
KR910009419B1 (ko) 1991-11-15
EP0307946B1 (de) 1994-11-17
JPS6474746A (en) 1989-03-20
JPH0815165B2 (ja) 1996-02-14
DE3852124T2 (de) 1995-03-23
US5038200A (en) 1991-08-06
EP0307946A2 (de) 1989-03-22
KR890005860A (ko) 1989-05-17

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee