DE3444376A1 - Integrierte schaltungsanordnung mit isolierung durch pn-uebergaenge - Google Patents

Integrierte schaltungsanordnung mit isolierung durch pn-uebergaenge

Info

Publication number
DE3444376A1
DE3444376A1 DE19843444376 DE3444376A DE3444376A1 DE 3444376 A1 DE3444376 A1 DE 3444376A1 DE 19843444376 DE19843444376 DE 19843444376 DE 3444376 A DE3444376 A DE 3444376A DE 3444376 A1 DE3444376 A1 DE 3444376A1
Authority
DE
Germany
Prior art keywords
collector
area
transistor
well
integrated circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19843444376
Other languages
German (de)
English (en)
Inventor
Rodney T. Tucson Ariz. Burt
Robert M. Stitt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Tucson Corp
Original Assignee
Burr Brown Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Burr Brown Corp filed Critical Burr Brown Corp
Publication of DE3444376A1 publication Critical patent/DE3444376A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03F—AMPLIFIERS
    • H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
    • H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is DC
    • G05F3/10—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is DC using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/26—Current mirrors
    • G05F3/265—Current mirrors using bipolar transistors only
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Automation & Control Theory (AREA)
  • Power Engineering (AREA)
  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
DE19843444376 1983-12-05 1984-12-05 Integrierte schaltungsanordnung mit isolierung durch pn-uebergaenge Withdrawn DE3444376A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US55782683A 1983-12-05 1983-12-05

Publications (1)

Publication Number Publication Date
DE3444376A1 true DE3444376A1 (de) 1985-08-01

Family

ID=24227040

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19843444376 Withdrawn DE3444376A1 (de) 1983-12-05 1984-12-05 Integrierte schaltungsanordnung mit isolierung durch pn-uebergaenge

Country Status (4)

Country Link
JP (1) JPS60124861A (enrdf_load_stackoverflow)
DE (1) DE3444376A1 (enrdf_load_stackoverflow)
FR (1) FR2556133A1 (enrdf_load_stackoverflow)
GB (1) GB2150779B (enrdf_load_stackoverflow)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3615049A1 (de) * 1986-05-03 1987-11-05 Bosch Gmbh Robert Spannungsgeschuetzte halbleiteranordnung

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63274169A (ja) * 1987-05-04 1988-11-11 Rohm Co Ltd 半導体装置
JP2642375B2 (ja) * 1988-01-26 1997-08-20 株式会社東芝 半導体集積回路装置
JP2634679B2 (ja) * 1990-03-12 1997-07-30 シャープ株式会社 Ｐｎｐトランジスタ回路
KR100558420B1 (ko) 1997-06-11 2006-03-07 세이코 엡슨 가부시키가이샤 반도체 장치 및 액정 표시 장치 및 그것들을 포함하는 전자 기기
DE10314151B4 (de) * 2003-03-28 2008-04-24 Infineon Technologies Ag Halbleiterbauelementeanordnung und Verfahren zur Kompensation parasitärer Ströme

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3558267A (en) * 1966-08-04 1971-01-26 Du Pont Method for dyeing high-temperature-resistant polyamides and polyimides
US4153909A (en) * 1973-12-10 1979-05-08 National Semiconductor Corporation Gated collector lateral transistor structure and circuits using same
DE2901727A1 (de) * 1978-02-14 1979-08-16 Motorola Inc Integrierte elektrische wandlerschaltung

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4028564A (en) * 1971-09-22 1977-06-07 Robert Bosch G.M.B.H. Compensated monolithic integrated current source

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3558267A (en) * 1966-08-04 1971-01-26 Du Pont Method for dyeing high-temperature-resistant polyamides and polyimides
US4153909A (en) * 1973-12-10 1979-05-08 National Semiconductor Corporation Gated collector lateral transistor structure and circuits using same
DE2901727A1 (de) * 1978-02-14 1979-08-16 Motorola Inc Integrierte elektrische wandlerschaltung

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3615049A1 (de) * 1986-05-03 1987-11-05 Bosch Gmbh Robert Spannungsgeschuetzte halbleiteranordnung

Also Published As

Publication number Publication date
FR2556133A1 (fr) 1985-06-07
GB2150779B (en) 1987-03-04
JPH0556660B2 (enrdf_load_stackoverflow) 1993-08-20
GB2150779A (en) 1985-07-03
JPS60124861A (ja) 1985-07-03
GB8417443D0 (en) 1984-08-15

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8125 Change of the main classification

Ipc: H01L 27/04

8130 Withdrawal