DE3278059D1 - High terminal count integrated circuit device package - Google Patents
High terminal count integrated circuit device packageInfo
- Publication number
- DE3278059D1 DE3278059D1 DE8282304775T DE3278059T DE3278059D1 DE 3278059 D1 DE3278059 D1 DE 3278059D1 DE 8282304775 T DE8282304775 T DE 8282304775T DE 3278059 T DE3278059 T DE 3278059T DE 3278059 D1 DE3278059 D1 DE 3278059D1
- Authority
- DE
- Germany
- Prior art keywords
- integrated circuit
- circuit device
- device package
- terminal count
- high terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5384—Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
- H01L23/5385—Assembly of a plurality of insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48095—Kinked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01014—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1517—Multilayer substrate
- H01L2924/15172—Fan-out arrangement of the internal vias
- H01L2924/15174—Fan-out arrangement of the internal vias in different layers of the multilayer substrate
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/04—Assemblies of printed circuits
- H05K2201/049—PCB for one component, e.g. for mounting onto mother PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09145—Edge details
- H05K2201/09181—Notches in edge pads
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10666—Plated through-hole for surface mounting on PCB
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/36—Assembling printed circuits with other printed circuits
- H05K3/368—Assembling printed circuits with other printed circuits parallel to each other
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US06/301,698 US4437141A (en) | 1981-09-14 | 1981-09-14 | High terminal count integrated circuit device package |
Publications (1)
Publication Number | Publication Date |
---|---|
DE3278059D1 true DE3278059D1 (en) | 1988-03-03 |
Family
ID=23164481
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE8282304775T Expired DE3278059D1 (en) | 1981-09-14 | 1982-09-10 | High terminal count integrated circuit device package |
Country Status (4)
Country | Link |
---|---|
US (1) | US4437141A (de) |
EP (1) | EP0074816B1 (de) |
JP (2) | JPS5860562A (de) |
DE (1) | DE3278059D1 (de) |
Families Citing this family (78)
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US4513355A (en) * | 1983-06-15 | 1985-04-23 | Motorola, Inc. | Metallization and bonding means and method for VLSI packages |
DE3516954A1 (de) * | 1984-05-14 | 1985-11-14 | Gigabit Logic, Inc., Newbury Park, Calif. | Montierte integrierte schaltung |
DE3430849A1 (de) * | 1984-08-22 | 1986-03-06 | Gerd 7742 St Georgen Kammerer | Verfahren zur raeumlichen ausweitung der elektrischen verbindung zwischen den anschlusskontakten hochintegrierter elektronischer bauelemente und den kontaktstellen einer elektrischen anschlussvorrichtung auf einem bauelementetraeger |
US4581680A (en) * | 1984-12-31 | 1986-04-08 | Gte Communication Systems Corporation | Chip carrier mounting arrangement |
US4618739A (en) * | 1985-05-20 | 1986-10-21 | General Electric Company | Plastic chip carrier package |
US4750092A (en) * | 1985-11-20 | 1988-06-07 | Kollmorgen Technologies Corporation | Interconnection package suitable for electronic devices and methods for producing same |
US4843188A (en) * | 1986-03-25 | 1989-06-27 | Western Digital Corporation | Integrated circuit chip mounting and packaging assembly |
FR2603739B1 (fr) * | 1986-09-05 | 1988-12-09 | Cimsa Sintra | Boitier de composant electronique muni de broches de connexion comportant un micro-boitier amovible |
JPS63169793A (ja) * | 1987-01-07 | 1988-07-13 | 株式会社村田製作所 | プリント基板へのチツプ部品の取付構造 |
US4860443A (en) * | 1987-01-21 | 1989-08-29 | Hughes Aircraft Company | Method for connecting leadless chip package |
JPH0787221B2 (ja) * | 1987-02-27 | 1995-09-20 | イビデン株式会社 | 半導体搭載用基板 |
US4918335A (en) * | 1987-11-06 | 1990-04-17 | Ford Aerospace Corporation | Interconnection system for integrated circuit chips |
US4858072A (en) * | 1987-11-06 | 1989-08-15 | Ford Aerospace & Communications Corporation | Interconnection system for integrated circuit chips |
US4987475A (en) * | 1988-02-29 | 1991-01-22 | Digital Equipment Corporation | Alignment of leads for ceramic integrated circuit packages |
US5091825A (en) * | 1988-03-29 | 1992-02-25 | Hughes Aircraft Company | Orthogonal bonding method and equipment |
US4882657A (en) * | 1988-04-06 | 1989-11-21 | Ici Array Technology, Inc. | Pin grid array assembly |
EP0341504A3 (de) * | 1988-05-09 | 1991-01-16 | General Electric Company | Plastik-Chipträgerpackung und Verfahren zum Herstellen derselben |
US4899256A (en) * | 1988-06-01 | 1990-02-06 | Chrysler Motors Corporation | Power module |
US4887148A (en) * | 1988-07-15 | 1989-12-12 | Advanced Micro Devices, Inc. | Pin grid array package structure |
EP0351581A1 (de) * | 1988-07-22 | 1990-01-24 | Oerlikon-Contraves AG | Hochintegrierte Schaltung sowie Verfahren zu deren Herstellung |
US4893216A (en) * | 1988-08-09 | 1990-01-09 | Northern Telecom Limited | Circuit board and method of soldering |
US5459634A (en) * | 1989-05-15 | 1995-10-17 | Rogers Corporation | Area array interconnect device and method of manufacture thereof |
US5014162A (en) * | 1989-06-27 | 1991-05-07 | At&T Bell Laboratories | Solder assembly of components |
DE3923533A1 (de) * | 1989-07-15 | 1991-01-24 | Diehl Gmbh & Co | Anordnung eines integrierten schaltkreises auf einem schaltungstraeger |
JP2799472B2 (ja) * | 1990-05-31 | 1998-09-17 | イビデン株式会社 | 電子部品搭載用基板 |
WO1991016740A1 (en) * | 1990-04-16 | 1991-10-31 | Mckenzie Socket Technology, Inc. | Intermediary adapter-connector |
US5679977A (en) * | 1990-09-24 | 1997-10-21 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
US5148265A (en) | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies with fan-in leads |
US5148266A (en) * | 1990-09-24 | 1992-09-15 | Ist Associates, Inc. | Semiconductor chip assemblies having interposer and flexible lead |
US20010030370A1 (en) * | 1990-09-24 | 2001-10-18 | Khandros Igor Y. | Microelectronic assembly having encapsulated wire bonding leads |
US7198969B1 (en) | 1990-09-24 | 2007-04-03 | Tessera, Inc. | Semiconductor chip assemblies, methods of making same and components for same |
US5132879A (en) * | 1990-10-01 | 1992-07-21 | Hewlett-Packard Company | Secondary board for mounting of components having differing bonding requirements |
US5216278A (en) * | 1990-12-04 | 1993-06-01 | Motorola, Inc. | Semiconductor device having a pad array carrier package |
US5177863A (en) * | 1992-03-27 | 1993-01-12 | Atmel Corporation | Method of forming integrated leadouts for a chip carrier |
US5266833A (en) * | 1992-03-30 | 1993-11-30 | Capps David F | Integrated circuit bus structure |
US5334857A (en) * | 1992-04-06 | 1994-08-02 | Motorola, Inc. | Semiconductor device with test-only contacts and method for making the same |
US5589668A (en) * | 1993-05-12 | 1996-12-31 | Hitachi Cable, Ltd. | Multi-metal layer wiring tab tape carrier and process for fabricating the same |
JP3461204B2 (ja) * | 1993-09-14 | 2003-10-27 | 株式会社東芝 | マルチチップモジュール |
US5473510A (en) * | 1994-03-25 | 1995-12-05 | Convex Computer Corporation | Land grid array package/circuit board assemblies and methods for constructing the same |
TW276356B (de) * | 1994-06-24 | 1996-05-21 | Ibm | |
JP3147666B2 (ja) * | 1994-07-21 | 2001-03-19 | 株式会社村田製作所 | 積層電子部品およびその製造方法 |
CA2156795C (en) * | 1994-08-31 | 1999-08-17 | Yuzo Shimada | An electronic device assembly and a manufacturing method of the same |
US5621193A (en) * | 1995-05-23 | 1997-04-15 | Northrop Grumman Corporation | Ceramic edge connect process |
US5609889A (en) * | 1995-05-26 | 1997-03-11 | Hestia Technologies, Inc. | Apparatus for encapsulating electronic packages |
US5652463A (en) * | 1995-05-26 | 1997-07-29 | Hestia Technologies, Inc. | Transfer modlded electronic package having a passage means |
TW353223B (en) * | 1995-10-10 | 1999-02-21 | Acc Microelectronics Corp | Semiconductor board providing high signal pin utilization |
JP3294490B2 (ja) * | 1995-11-29 | 2002-06-24 | 株式会社日立製作所 | Bga型半導体装置 |
US6734545B1 (en) * | 1995-11-29 | 2004-05-11 | Hitachi, Ltd. | BGA type semiconductor device and electronic equipment using the same |
US5731709A (en) * | 1996-01-26 | 1998-03-24 | Motorola, Inc. | Method for testing a ball grid array semiconductor device and a device for such testing |
WO1997046063A1 (en) * | 1996-05-31 | 1997-12-04 | The Whitaker Corporation | Lead attach for chip on board printed wiring board |
US5759737A (en) * | 1996-09-06 | 1998-06-02 | International Business Machines Corporation | Method of making a component carrier |
US6040624A (en) * | 1997-10-02 | 2000-03-21 | Motorola, Inc. | Semiconductor device package and method |
KR100259359B1 (ko) * | 1998-02-10 | 2000-06-15 | 김영환 | 반도체 패키지용 기판 및 반도체 패키지, 그리고 그 제조방법 |
US6689634B1 (en) * | 1999-09-22 | 2004-02-10 | Texas Instruments Incorporated | Modeling technique for selectively depopulating electrical contacts from a foot print of a grid array (BGA or LGA) package to increase device reliability |
WO2002069680A2 (en) * | 2001-01-17 | 2002-09-06 | Honeywell International Inc. | Adapter for plastic-leaded chip carrier (plcc) and other surface mount technology (smt) chip carriers |
US6722896B2 (en) * | 2001-03-22 | 2004-04-20 | Molex Incorporated | Stitched LGA connector |
US6694609B2 (en) | 2001-03-22 | 2004-02-24 | Molex Incorporated | Method of making stitched LGA connector |
US9155544B2 (en) | 2002-03-20 | 2015-10-13 | P Tech, Llc | Robotic systems and methods |
US20040105244A1 (en) * | 2002-08-06 | 2004-06-03 | Ilyas Mohammed | Lead assemblies with offset portions and microelectronic assemblies with leads having offset portions |
US7205652B2 (en) | 2005-03-23 | 2007-04-17 | Delphi Technologies, Inc | Electronic assembly including multiple substrates |
DE102007041770A1 (de) * | 2007-09-04 | 2009-03-05 | Continental Automotive Gmbh | Leiterplattenstapel aus löttechnisch miteinander verbundenen Leiterplatten |
US8053349B2 (en) * | 2007-11-01 | 2011-11-08 | Texas Instruments Incorporated | BGA package with traces for plating pads under the chip |
US7829977B2 (en) * | 2007-11-15 | 2010-11-09 | Advanced Semiconductor Engineering, Inc. | Low temperature co-fired ceramics substrate and semiconductor package |
JP2010093109A (ja) | 2008-10-09 | 2010-04-22 | Renesas Technology Corp | 半導体装置、半導体装置の製造方法および半導体モジュールの製造方法 |
US9429983B1 (en) | 2013-09-12 | 2016-08-30 | Advanced Processor Architectures, Llc | System clock distribution in a distributed computing environment |
US9645603B1 (en) | 2013-09-12 | 2017-05-09 | Advanced Processor Architectures, Llc | System clock distribution in a distributed computing environment |
WO2011017676A1 (en) | 2009-08-07 | 2011-02-10 | Advanced Processor Architectures, Llc | Distributed computing |
US11042211B2 (en) | 2009-08-07 | 2021-06-22 | Advanced Processor Architectures, Llc | Serially connected computing nodes in a distributed computing system |
US20110278054A1 (en) * | 2010-05-14 | 2011-11-17 | I-Tseng Lee | Circuit board with notched conductor pads |
USD668659S1 (en) * | 2011-11-15 | 2012-10-09 | Connectblue Ab | Module |
USD692896S1 (en) * | 2011-11-15 | 2013-11-05 | Connectblue Ab | Module |
USD680545S1 (en) * | 2011-11-15 | 2013-04-23 | Connectblue Ab | Module |
USD680119S1 (en) * | 2011-11-15 | 2013-04-16 | Connectblue Ab | Module |
USD668658S1 (en) * | 2011-11-15 | 2012-10-09 | Connectblue Ab | Module |
USD689053S1 (en) * | 2011-11-15 | 2013-09-03 | Connectblue Ab | Module |
JP2016122802A (ja) * | 2014-12-25 | 2016-07-07 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
FR3040532B1 (fr) | 2015-08-31 | 2017-10-13 | St Microelectronics Tours Sas | Puce a montage en surface |
GB2600918B (en) * | 2020-10-30 | 2022-11-23 | Npl Management Ltd | Ion microtrap assembly and method of making of making such an assembly |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
BE540252A (de) | 1954-08-02 | 1955-08-31 | ||
US2986675A (en) | 1958-06-30 | 1961-05-30 | Engineered Electronics Company | Electronic structure |
BE630750A (de) | 1962-04-09 | 1963-04-08 | ||
BE631489A (de) | 1962-04-27 | |||
FR2181892B2 (de) * | 1967-02-02 | 1979-07-27 | Bunker Ramo | |
US3656058A (en) | 1969-07-02 | 1972-04-11 | Claude L Leathers | Environmental test bed assembly for miniature electronic components |
US3588615A (en) | 1970-03-02 | 1971-06-28 | Ibm | Pluggable module connector system |
JPS5636153B2 (de) * | 1972-11-16 | 1981-08-21 | ||
US4147889A (en) * | 1978-02-28 | 1979-04-03 | Amp Incorporated | Chip carrier |
JPS5568658A (en) * | 1978-11-17 | 1980-05-23 | Matsushita Electric Ind Co Ltd | Lead wireless integrated circuit package |
EP0016522B1 (de) * | 1979-02-19 | 1982-12-22 | Fujitsu Limited | Halbleitervorrichtung und Verfahren zu deren Herstellung |
JPS55124248A (en) * | 1979-03-20 | 1980-09-25 | Nec Corp | Leadless package |
DE3030763A1 (de) * | 1979-08-17 | 1981-03-26 | Amdahl Corp., Sunnyvale, Calif. | Packung fuer eine integrierte schaltung in plaettchenform |
US4288841A (en) | 1979-09-20 | 1981-09-08 | Bell Telephone Laboratories, Incorporated | Double cavity semiconductor chip carrier |
-
1981
- 1981-09-14 US US06/301,698 patent/US4437141A/en not_active Expired - Lifetime
-
1982
- 1982-09-10 EP EP82304775A patent/EP0074816B1/de not_active Expired
- 1982-09-10 DE DE8282304775T patent/DE3278059D1/de not_active Expired
- 1982-09-13 JP JP57159406A patent/JPS5860562A/ja active Pending
-
1988
- 1988-01-18 JP JP63008200A patent/JPS63211660A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0074816B1 (de) | 1988-01-27 |
JPS63211660A (ja) | 1988-09-02 |
JPS5860562A (ja) | 1983-04-11 |
EP0074816A2 (de) | 1983-03-23 |
EP0074816A3 (en) | 1985-01-30 |
US4437141A (en) | 1984-03-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |