DE3237224C2 - - Google Patents

Info

Publication number
DE3237224C2
DE3237224C2 DE3237224A DE3237224A DE3237224C2 DE 3237224 C2 DE3237224 C2 DE 3237224C2 DE 3237224 A DE3237224 A DE 3237224A DE 3237224 A DE3237224 A DE 3237224A DE 3237224 C2 DE3237224 C2 DE 3237224C2
Authority
DE
Germany
Prior art keywords
test data
memories
auxiliary
memory
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3237224A
Other languages
German (de)
English (en)
Other versions
DE3237224A1 (de
Inventor
Garry Carter Westlake Village Calif. Us Gillete
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Teradyne Inc
Original Assignee
Teradyne Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Teradyne Inc filed Critical Teradyne Inc
Publication of DE3237224A1 publication Critical patent/DE3237224A1/de
Application granted granted Critical
Publication of DE3237224C2 publication Critical patent/DE3237224C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]
    • G01R31/31919—Storing and outputting test patterns
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31903—Tester hardware, i.e. output processing circuits tester configuration
    • G01R31/31908—Tester set-up, e.g. configuring the tester to the device under test [DUT], down loading test patterns

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
DE19823237224 1981-10-09 1982-10-07 Vorrichtung zum erzeugen einer folge von pruefdaten fuer lsi-schaltungen Granted DE3237224A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/309,982 US4451918A (en) 1981-10-09 1981-10-09 Test signal reloader

Publications (2)

Publication Number Publication Date
DE3237224A1 DE3237224A1 (de) 1983-05-05
DE3237224C2 true DE3237224C2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1992-04-30

Family

ID=23200492

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19823237224 Granted DE3237224A1 (de) 1981-10-09 1982-10-07 Vorrichtung zum erzeugen einer folge von pruefdaten fuer lsi-schaltungen

Country Status (5)

Country Link
US (1) US4451918A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JPS5875078A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
DE (1) DE3237224A1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
FR (1) FR2514529B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
GB (1) GB2108278B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

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US4517661A (en) * 1981-07-16 1985-05-14 International Business Machines Corporation Programmable chip tester having plural pin unit buffers which each store sufficient test data for independent operations by each pin unit
US4502127A (en) * 1982-05-17 1985-02-26 Fairchild Camera And Instrument Corporation Test system memory architecture for passing parameters and testing dynamic components
DE3237365A1 (de) * 1982-10-08 1984-04-12 Siemens AG, 1000 Berlin und 8000 München Anordnung zur erzeugung von mustern von pruefsignalen bei einem pruefgeraet
JPS59161744A (ja) * 1983-03-04 1984-09-12 Hitachi Ltd 情報処理装置のスキヤン方式
US4622668A (en) * 1984-05-09 1986-11-11 International Business Machines Corporation Process and apparatus for testing a microprocessor and dynamic ram
US4598398A (en) * 1984-06-22 1986-07-01 Itt Corporation Test apparatus for PCM/FDM transmultiplexer
JPS61126482A (ja) * 1984-11-26 1986-06-13 Yokogawa Electric Corp デイジタルパタ−ンテスタ
JPS61126480A (ja) * 1984-11-26 1986-06-13 Yokogawa Electric Corp デイジタルパタ−ンテスタ
US4937827A (en) * 1985-03-01 1990-06-26 Mentor Graphics Corporation Circuit verification accessory
US4727312A (en) * 1985-12-23 1988-02-23 Genrad, Inc. Circuit tester
US4744084A (en) * 1986-02-27 1988-05-10 Mentor Graphics Corporation Hardware modeling system and method for simulating portions of electrical circuits
JPH0814982B2 (ja) * 1986-03-10 1996-02-14 日本電気株式会社 半導体記憶装置
JPH0746127B2 (ja) * 1986-05-20 1995-05-17 三菱電機株式会社 半導体試験装置
USH607H (en) 1986-06-27 1989-03-07 The United States Of America As Represented By The Secretary Of The Navy Addressable delay memory
US4730318A (en) * 1986-11-24 1988-03-08 International Business Machines Corporation Modular organized storage tester
DE3714770A1 (de) * 1987-05-04 1988-11-24 Siemens Ag Verfahren und anordnung zur erzeugung von pruefdaten fuer eine digitale schaltung
US4876685A (en) * 1987-06-08 1989-10-24 Teradyne, Inc. Failure information processing in automatic memory tester
US4882673A (en) * 1987-10-02 1989-11-21 Advanced Micro Devices, Inc. Method and apparatus for testing an integrated circuit including a microprocessor and an instruction cache
US4875210A (en) * 1988-01-06 1989-10-17 Teradyne, Inc. Automatic circuit tester control system
GB2214314B (en) * 1988-01-07 1992-01-02 Genrad Ltd Automatic circuit tester
US4967412A (en) * 1988-04-08 1990-10-30 Hewlett-Packard Company Serial data frame generator for testing telecommunications circuits
US5265102A (en) * 1989-06-16 1993-11-23 Advantest Corporation Test pattern generator
US5321700A (en) * 1989-10-11 1994-06-14 Teradyne, Inc. High speed timing generator
EP0432292A1 (en) * 1989-12-12 1991-06-19 Advantest Corporation Logic IC tester
US5212443A (en) * 1990-09-05 1993-05-18 Schlumberger Technologies, Inc. Event sequencer for automatic test equipment
US5225772A (en) * 1990-09-05 1993-07-06 Schlumberger Technologies, Inc. Automatic test equipment system using pin slice architecture
US5195097A (en) * 1990-10-19 1993-03-16 International Business Machines Corporation High speed tester
DE4143468C2 (de) * 1990-10-30 2000-03-16 Teradyne Inc Schaltungsanordnung zur Erzeugung von Ausgangsimpulsen und Zeitsteuerschaltung für eine Schaltungsprüfvorrichtung
US6286120B1 (en) 1994-09-01 2001-09-04 Teradyne, Inc. Memory architecture for automatic test equipment using vector module table
US6826721B2 (en) * 2001-11-01 2004-11-30 Agilent Technoloiges, Inc. Data accelerator and methods for increasing data throughput
KR100914236B1 (ko) * 2007-06-28 2009-08-26 삼성전자주식회사 테스트 어드레스 생성회로를 가지는 반도체 메모리 장치 및테스트 방법.
US8295182B2 (en) * 2007-07-03 2012-10-23 Credence Systems Corporation Routed event test system and method

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US2905930A (en) * 1954-05-24 1959-09-22 Underwood Corp Data transfer system
GB971247A (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) * 1962-04-19
US3311890A (en) * 1963-08-20 1967-03-28 Bell Telephone Labor Inc Apparatus for testing a storage system
US3474421A (en) * 1965-06-16 1969-10-21 Burroughs Corp Memory core testing apparatus
DE1810413B2 (de) * 1968-11-22 1973-09-06 Siemens AG, 1000 Berlin u. 8000 München Verfahren zum ausgeben von daten aus einer datenverarbeitungsanlage an externe geraete und zum eingeben von daten von den externen geraeten in die datenverarbeitungsanlage
US3828319A (en) * 1969-06-23 1974-08-06 Ipc Service Ltd Composition system
US3805243A (en) * 1971-02-22 1974-04-16 Cogar Corp Apparatus and method for determining partial memory chip categories
US3739349A (en) * 1971-05-24 1973-06-12 Sperry Rand Corp Digital equipment interface unit
US3772657A (en) * 1971-11-30 1973-11-13 Mi2 Inc Columbus Magnetic tape data handling system employing dual data block buffers
US3761894A (en) * 1972-05-12 1973-09-25 Bell Telephone Labor Inc Partitioned ramdom access memories for increasing throughput rate
US3781829A (en) * 1972-06-16 1973-12-25 Ibm Test pattern generator
US3832535A (en) * 1972-10-25 1974-08-27 Instrumentation Engineering Digital word generating and receiving apparatus
GB1441817A (en) * 1973-07-19 1976-07-07 Int Computers Ltd Data processing apparatus
US3873818A (en) * 1973-10-29 1975-03-25 Ibm Electronic tester for testing devices having a high circuit density
GB1529842A (en) * 1975-10-09 1978-10-25 Texas Instruments Ltd Digital data stores and data storage systems
DE2615306C2 (de) * 1976-04-08 1982-06-03 Vereinigte Flugtechnische Werke Gmbh, 2800 Bremen Meßdatenerfassungs- und Verarbeitungsanlage
JPS5361234A (en) * 1976-11-12 1978-06-01 Matsushita Electric Ind Co Ltd Memory unit
US4195343A (en) * 1977-12-22 1980-03-25 Honeywell Information Systems Inc. Round robin replacement for a cache store
JPS5847741B2 (ja) * 1978-03-29 1983-10-24 日本電信電話株式会社 パタ−ン発生器
US4216539A (en) * 1978-05-05 1980-08-05 Zehntel, Inc. In-circuit digital tester
US4195770A (en) * 1978-10-24 1980-04-01 Burroughs Corporation Test generator for random access memories
JPS5585265A (en) * 1978-12-23 1980-06-27 Toshiba Corp Function test evaluation device for integrated circuit
US4249173A (en) * 1979-09-14 1981-02-03 Burroughs Corporation Logic signals control system
JPS57131076A (en) * 1981-02-06 1982-08-13 Hitachi Ltd Pattern generator for testing high speed lsi

Also Published As

Publication number Publication date
DE3237224A1 (de) 1983-05-05
FR2514529A1 (fr) 1983-04-15
US4451918A (en) 1984-05-29
FR2514529B1 (fr) 1989-04-28
GB2108278A (en) 1983-05-11
JPH0321075B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 1991-03-20
JPS5875078A (ja) 1983-05-06
GB2108278B (en) 1985-06-05

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Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee