JPS57131076A - Pattern generator for testing high speed lsi - Google Patents

Pattern generator for testing high speed lsi

Info

Publication number
JPS57131076A
JPS57131076A JP56015734A JP1573481A JPS57131076A JP S57131076 A JPS57131076 A JP S57131076A JP 56015734 A JP56015734 A JP 56015734A JP 1573481 A JP1573481 A JP 1573481A JP S57131076 A JPS57131076 A JP S57131076A
Authority
JP
Japan
Prior art keywords
memories
high speed
test
steps
capacity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56015734A
Other languages
Japanese (ja)
Inventor
Hiroyuki Adachi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56015734A priority Critical patent/JPS57131076A/en
Publication of JPS57131076A publication Critical patent/JPS57131076A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/319—Tester hardware, i.e. output processing circuits
    • G01R31/31917—Stimuli generation or application of test patterns to the device under test [DUT]

Abstract

PURPOSE:To test a long and large test pattern without increasing the capacity of high speed memories by transferring the pattern data from each low speed, large capacity memory to a block area of each high speed small capacity memory. CONSTITUTION:When a tester is initialized, the test pattern is divided into units of 500 steps and loaded to the low speed, high capacity memories 1A-1D. When the test is started, lower areas 2AL-2DL of the high speed, low capacity memories 2A-2D are sequentially accessed, and initial 2,000 steps are applied to a device to be measured (n pins) 4. Meanwhile, addresses 500-999 of the memory 1A are accessed during said period, and the data are transferred to upper areas 2AU-2DU of the memories 2A-2D. The upper areas 2AU-2DU of the memories 2A-2D, in which the data are newly written, are sequentially accessed, and 2,000 steps from 2,001-4,000 are applied to the device to be measured 4. This procedure is likewise repeated up to 10,000 steps and the test is performed.
JP56015734A 1981-02-06 1981-02-06 Pattern generator for testing high speed lsi Pending JPS57131076A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56015734A JPS57131076A (en) 1981-02-06 1981-02-06 Pattern generator for testing high speed lsi

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56015734A JPS57131076A (en) 1981-02-06 1981-02-06 Pattern generator for testing high speed lsi

Publications (1)

Publication Number Publication Date
JPS57131076A true JPS57131076A (en) 1982-08-13

Family

ID=11896990

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56015734A Pending JPS57131076A (en) 1981-02-06 1981-02-06 Pattern generator for testing high speed lsi

Country Status (1)

Country Link
JP (1) JPS57131076A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875078A (en) * 1981-10-09 1983-05-06 テラダイン・インコ−ポレ−テツド Test-data feeder for testing large-scale integrated circuit device
JPH0312573A (en) * 1989-06-09 1991-01-21 Hitachi Ltd Logic circuit testing device having test data changing circuit
JPH06100220A (en) * 1992-09-24 1994-04-12 Roll Tec:Kk Roller and roller device
GB2381875A (en) * 2001-11-01 2003-05-14 Agilent Technologies Inc Test system or method for integrated circuits

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5875078A (en) * 1981-10-09 1983-05-06 テラダイン・インコ−ポレ−テツド Test-data feeder for testing large-scale integrated circuit device
JPH0321075B2 (en) * 1981-10-09 1991-03-20 Teradyne Inc
JPH0312573A (en) * 1989-06-09 1991-01-21 Hitachi Ltd Logic circuit testing device having test data changing circuit
JPH06100220A (en) * 1992-09-24 1994-04-12 Roll Tec:Kk Roller and roller device
GB2381875A (en) * 2001-11-01 2003-05-14 Agilent Technologies Inc Test system or method for integrated circuits
GB2381875B (en) * 2001-11-01 2005-04-27 Agilent Technologies Inc System and method for testing circuits and programming integrated circuit devices

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