JPS556201A - Memory device testing method - Google Patents
Memory device testing methodInfo
- Publication number
- JPS556201A JPS556201A JP7736678A JP7736678A JPS556201A JP S556201 A JPS556201 A JP S556201A JP 7736678 A JP7736678 A JP 7736678A JP 7736678 A JP7736678 A JP 7736678A JP S556201 A JPS556201 A JP S556201A
- Authority
- JP
- Japan
- Prior art keywords
- addresses
- standard
- address
- jump
- written
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Abstract
PURPOSE: To improve the trouble detecting ability and to form such test patterns as can shorten the test time by dividing memory addresses into standard addresses and jump priority addresses so that the tests for a preset step are conducted for all standard addresses.
CONSTITUTION: 0(1) is written in all the memory addresses of matrix construction, and the addresses from 0 to the maximum are used as standard addresses. All the addresses excepting the standard addresses of lines and rows including the standard addresses are used as jump priority addresses. 1(0) is written in one of the standard addresses. For each of the jump priority addresses for that standard address, the three steps of the reading operations of the jump priority address 0(1), the standard address 1(0) and the jump priority address 0(1) are accomplished. Finally, they are rewritten into the standard address 0(1). Then, 1(0) is written in another standard address, and similar tests are accomplished. The same tests are accomplished for all the standard addresses in a similar manner.
COPYRIGHT: (C)1980,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7736678A JPS556201A (en) | 1978-06-28 | 1978-06-28 | Memory device testing method |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7736678A JPS556201A (en) | 1978-06-28 | 1978-06-28 | Memory device testing method |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS556201A true JPS556201A (en) | 1980-01-17 |
Family
ID=13631900
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7736678A Pending JPS556201A (en) | 1978-06-28 | 1978-06-28 | Memory device testing method |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS556201A (en) |
-
1978
- 1978-06-28 JP JP7736678A patent/JPS556201A/en active Pending
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