DE3041232A1 - Halbleiteranordnung mit einer anzahl in reihe geschalteter dioden und verfahren zu deren herstellung - Google Patents

Halbleiteranordnung mit einer anzahl in reihe geschalteter dioden und verfahren zu deren herstellung

Info

Publication number
DE3041232A1
DE3041232A1 DE19803041232 DE3041232A DE3041232A1 DE 3041232 A1 DE3041232 A1 DE 3041232A1 DE 19803041232 DE19803041232 DE 19803041232 DE 3041232 A DE3041232 A DE 3041232A DE 3041232 A1 DE3041232 A1 DE 3041232A1
Authority
DE
Germany
Prior art keywords
semiconductor
layer
electrode
highly doped
region
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19803041232
Other languages
German (de)
English (en)
Inventor
Dominique Paris Boccon-Gibod
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE3041232A1 publication Critical patent/DE3041232A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76838Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the conductors
    • H01L21/76895Local interconnects; Local pads, as exemplified by patent document EP0896365
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/764Air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/0814Diodes only

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Electrodes Of Semiconductors (AREA)
DE19803041232 1979-11-07 1980-11-03 Halbleiteranordnung mit einer anzahl in reihe geschalteter dioden und verfahren zu deren herstellung Withdrawn DE3041232A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7927480A FR2469804A1 (fr) 1979-11-07 1979-11-07 Procede de realisation d'un dispositif semi-conducteur comprenant un assemblage de diodes en serie et dispositif en resultant

Publications (1)

Publication Number Publication Date
DE3041232A1 true DE3041232A1 (de) 1981-05-14

Family

ID=9231399

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19803041232 Withdrawn DE3041232A1 (de) 1979-11-07 1980-11-03 Halbleiteranordnung mit einer anzahl in reihe geschalteter dioden und verfahren zu deren herstellung

Country Status (6)

Country Link
JP (1) JPS5676583A (fr)
CA (1) CA1165009A (fr)
DE (1) DE3041232A1 (fr)
FR (1) FR2469804A1 (fr)
GB (1) GB2062961A (fr)
NL (1) NL8006019A (fr)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07107940B2 (ja) * 1983-01-28 1995-11-15 三洋電機株式会社 シヨツトキバリヤダイオ−ド装置
WO2007142603A1 (fr) * 2006-06-09 2007-12-13 Agency For Science, Technology And Research Masque perforé intégré et son procédé de fabrication

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2001468A1 (de) * 1970-01-14 1971-07-22 Philips Nv Verfahren zur Herstellung von Halbleiterbauelementen
GB1300033A (en) * 1970-02-13 1972-12-20 Texas Instruments Inc Integrated circuits

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1244759A (en) * 1968-12-11 1971-09-02 Associated Semiconductor Mft Improvements in and relating to methods of manufacturing semiconductor devices
FR2335957A1 (fr) * 1975-12-17 1977-07-15 Radiotechnique Compelec Dispositif semiconducteur monolithique comprenant un pont de redressement
FR2363896A2 (fr) * 1976-09-01 1978-03-31 Radiotechnique Compelec Dispositif semi-conducteur monolithique comprenant un pont de redressement
JPS5439582A (en) * 1977-09-02 1979-03-27 Nec Corp Integrated composite diode device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2001468A1 (de) * 1970-01-14 1971-07-22 Philips Nv Verfahren zur Herstellung von Halbleiterbauelementen
GB1300033A (en) * 1970-02-13 1972-12-20 Texas Instruments Inc Integrated circuits

Also Published As

Publication number Publication date
FR2469804B1 (fr) 1983-04-29
GB2062961A (en) 1981-05-28
JPS5676583A (en) 1981-06-24
NL8006019A (nl) 1981-06-01
FR2469804A1 (fr) 1981-05-22
CA1165009A (fr) 1984-04-03

Similar Documents

Publication Publication Date Title
DE3587798T2 (de) SoI-Halbleiteranordnung und Verfahren zu ihrer Herstellung.
DE2217538C3 (de) Verfahren zur Herstellung von Zwischenverbindungen in einer Halbleiteranordnung
DE1514818C3 (fr)
DE2212049C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung und Verfahren zur Herstellung eines Transistors
DE69505348T2 (de) Hochspannungs-MOSFET mit Feldplatten-Elektrode und Verfahren zur Herstellung
CH444969A (de) Kontaktierte Schaltungsanordnung und Verfahren zu deren Herstellung
DE69420944T2 (de) Halbleitervorrichtung und herstellungsverfahren
DE3043289A1 (de) Herstellungverfahren fuer eine halbleitereinrichtung
DE2646404A1 (de) Verfahren zur herstellung von halbleitervorrichtungen mit hoher waermeleitfaehigkeit
DE2550346A1 (de) Verfahren zum herstellen eines elektrisch isolierenden bereiches in dem halbleiterkoerper eines halbleiterbauelements
DE2510757A1 (de) Verfahren zum herstellen von traegersubstraten fuer hochintegrierte halbleiter-schaltungsplaettchen und durch dieses verfahren hergestellte substrate
DE2839044A1 (de) Halbleiterbauelement mit schottky- sperrschichtuebergang
DE2556038A1 (de) Verfahren zur herstellung von feldeffekttransistoren fuer sehr hohe frequenzen nach der technik integrierter schaltungen
DE1946302A1 (de) Integrierte Halbleiterschaltung
DE3711033A1 (de) Mosfet-halbleitervorrichtung
DE69321966T2 (de) Leistungs-Halbleiterbauelement
DE2458410C2 (de) Herstellungsverfahren für eine Halbleiteranordnung
DE3209666A1 (de) Halbleitervorrichtung und verfahren zum herstellen eines aufbaumetallkontaktes derselben
DE69223118T2 (de) Dünnschicht-Transistor-Panel und dessen Herstellungsmethode
EP0260471A1 (fr) Dispositif semi-conducteur de puissance
DE69422252T2 (de) Halbleiteranordnung mit einem Halbleiterelement ausgestaltet in einer Mesastruktur
DE3041232A1 (de) Halbleiteranordnung mit einer anzahl in reihe geschalteter dioden und verfahren zu deren herstellung
DE2800363C2 (de) Halbleiteranordnung und Verfahren zu deren Herstellung
DE1489193C3 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE68917197T2 (de) Bipolarer Leistungshalbleiteranordnung und Verfahren zur ihrer Herstellung.

Legal Events

Date Code Title Description
8110 Request for examination paragraph 44
8130 Withdrawal