GB1300033A - Integrated circuits - Google Patents

Integrated circuits

Info

Publication number
GB1300033A
GB1300033A GB2126271A GB2126271A GB1300033A GB 1300033 A GB1300033 A GB 1300033A GB 2126271 A GB2126271 A GB 2126271A GB 2126271 A GB2126271 A GB 2126271A GB 1300033 A GB1300033 A GB 1300033A
Authority
GB
United Kingdom
Prior art keywords
mesas
grooves
regions
substrate
type
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB2126271A
Inventor
Tzu Fann Shao
Benjamin Johnston Sloan Jr
Billy Max Martin
Loyd Harold Clevenger
Roger Stanley Dunn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of GB1300033A publication Critical patent/GB1300033A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821Collector regions of bipolar transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching
    • H01L21/30608Anisotropic liquid etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308Chemical or electrical treatment, e.g. electrolytic etching using masks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/764Air gaps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/535Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including internal interconnections, e.g. cross-under constructions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Element Separation (AREA)
  • Bipolar Transistors (AREA)

Abstract

1300033 Semi-conductor devices TEXAS INSTRUMENTS Inc 19 April 1971 [13 Feb 1970] 21262/71 Heading H1K In an integrated circuit comprising a plurality of mesas on a semi-conductor substrate 11 of opposite conductivity type to at least the lower parts of the mesas, low resistivity regions 12 forming PN junctions with the substrate 11 are provided beneath the mesas and the grooves 16, 17 surrounding the mesas, electrical contact being established to the regions 12 through windows in an insulating layer 19 lining the grooves 16, 17. At least some of the mesas contain circuit components such as transistors, diodes and resistors. In the Si integrated circuit described the P type substrate 11 is B-doped and has a (100) orientation. An N type epitaxial layer 13 is deposited thereon after selective diffusion of As to form N+ regions 12, and B is then diffused non-selectively to form a P type surface layer 14. The grooves 16, 17 are formed using an anisotropic etchant, and circuit elements are formed in the mesas so formed. In a modification the circuit elements are formed by selective diffusion before the mesa configuration is produced by etching.
GB2126271A 1970-02-13 1971-04-19 Integrated circuits Expired GB1300033A (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US1107070A 1970-02-13 1970-02-13
US1104470A 1970-02-13 1970-02-13

Publications (1)

Publication Number Publication Date
GB1300033A true GB1300033A (en) 1972-12-20

Family

ID=26681909

Family Applications (1)

Application Number Title Priority Date Filing Date
GB2126271A Expired GB1300033A (en) 1970-02-13 1971-04-19 Integrated circuits

Country Status (3)

Country Link
DE (1) DE2106540A1 (en)
FR (1) FR2080989B1 (en)
GB (1) GB1300033A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3041232A1 (en) * 1979-11-07 1981-05-14 Naamloze Vennootschap Philips' Gloeilampenfabrieken, Eindhoven SEMICONDUCTOR ARRANGEMENT WITH A NUMBER OF DIODES SWITCHED IN SERIES AND METHOD FOR THE PRODUCTION THEREOF
DE3408552A1 (en) * 1983-03-10 1984-09-20 Tokyo Shibaura Denki K.K., Kawasaki SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME
US4677456A (en) * 1979-05-25 1987-06-30 Raytheon Company Semiconductor structure and manufacturing method

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3818289A (en) * 1972-04-10 1974-06-18 Raytheon Co Semiconductor integrated circuit structures
DE3716469A1 (en) * 1987-04-07 1988-10-27 Licentia Gmbh Patterned semiconductor body

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1493465A (en) * 1966-05-03 1967-09-01 Radiotechnique Coprim Rtc Improvements in semiconductor device manufacturing processes
NL144778B (en) * 1966-12-20 1975-01-15 Western Electric Co METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE BY ANISOTROOPE ETCHING AS WELL AS THE DEVICE MANUFACTURED THEREFORE.
FR1527898A (en) * 1967-03-16 1968-06-07 Radiotechnique Coprim Rtc Arrangement of semiconductor devices carried by a common support and its manufacturing method
US3483464A (en) * 1967-08-10 1969-12-09 Bell Telephone Labor Inc Voltage regulator systems employing a multifunctional circuit comprising a field effect transistor constant current source
GB1248051A (en) * 1968-03-01 1971-09-29 Post Office Method of making insulated gate field effect transistors
GB1244759A (en) * 1968-12-11 1971-09-02 Associated Semiconductor Mft Improvements in and relating to methods of manufacturing semiconductor devices

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4677456A (en) * 1979-05-25 1987-06-30 Raytheon Company Semiconductor structure and manufacturing method
DE3041232A1 (en) * 1979-11-07 1981-05-14 Naamloze Vennootschap Philips' Gloeilampenfabrieken, Eindhoven SEMICONDUCTOR ARRANGEMENT WITH A NUMBER OF DIODES SWITCHED IN SERIES AND METHOD FOR THE PRODUCTION THEREOF
DE3408552A1 (en) * 1983-03-10 1984-09-20 Tokyo Shibaura Denki K.K., Kawasaki SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME

Also Published As

Publication number Publication date
FR2080989B1 (en) 1976-03-19
FR2080989A1 (en) 1971-11-26
DE2106540A1 (en) 1971-08-19

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee