GB1248051A - Method of making insulated gate field effect transistors - Google Patents

Method of making insulated gate field effect transistors

Info

Publication number
GB1248051A
GB1248051A GB1010068A GB1010068A GB1248051A GB 1248051 A GB1248051 A GB 1248051A GB 1010068 A GB1010068 A GB 1010068A GB 1010068 A GB1010068 A GB 1010068A GB 1248051 A GB1248051 A GB 1248051A
Authority
GB
United Kingdom
Prior art keywords
layer
grooves
type
substrate
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB1010068A
Inventor
Peter Joseph Talbot-Mellor
Keith James Wilson
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Post Office
Original Assignee
Post Office
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Post Office filed Critical Post Office
Priority to GB1010068A priority Critical patent/GB1248051A/en
Priority to NL6902936A priority patent/NL6902936A/xx
Priority to DE19691910297 priority patent/DE1910297A1/en
Priority to FR6905631A priority patent/FR2003068A7/fr
Publication of GB1248051A publication Critical patent/GB1248051A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/511Insulating materials associated therewith with a compositional variation, e.g. multilayer structures
    • H01L29/513Insulating materials associated therewith with a compositional variation, e.g. multilayer structures the variation being perpendicular to the channel plane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/74Making of localized buried regions, e.g. buried collector layers, internal connections substrate contacts
    • H01L21/743Making of internal connections, substrate contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41741Source or drain electrodes for field effect devices for vertical or pseudo-vertical devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/51Insulating materials associated therewith
    • H01L29/518Insulating materials associated therewith the insulating material containing nitrogen, e.g. nitride, oxynitride, nitrogen-doped material
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7827Vertical transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7831Field effect transistors with field effect produced by an insulated gate with multiple gate structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28158Making the insulator
    • H01L21/28167Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation
    • H01L21/28194Making the insulator on single crystalline silicon, e.g. using a liquid, i.e. chemical oxidation by deposition, e.g. evaporation, ALD, CVD, sputtering, laser deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356Disposition, e.g. buried gate electrode
    • H01L29/4236Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

1,248,051. IGFETs. POST OFFICE. 3 March, 1969 [1 March, 1968], No. 10100/68. Heading H1K. An IGFET is formed by depositing a layer of P(N) type on a layer of N(P) type material and diffusing impurity into it to form a second N(P) layer, forming a trough extending through the other layers into the first N(P) layer, providing insulating material on the groove walls and then depositing a metal electrode on the insulation where it overlies the P(N) layer. A typical device, Fig. 3, is formed by epitaxially depositing a 1 ohm. cm. N-type silicon layer 8 6 Á thick on a 0.005 ohm cm. silicon substrate 7 and then forming a P-type layer 11 by planar diffusion techniques. Grooves 15 extending to the substrate are formed by photoresist and etching steps and then the exposed surfaces of the grooves coated with oxide 1500 Š thick. The interdigitated drain 20 and gate 21 electrodes and electrodes 19, all of which extend over an overall oxide layer to enlarged contact pads are then shaped by etching from an evaporated layer of aluminium. The substrate is attached to a header constituting the source electrode. Source-drain capacitance may be reduced by leaving the bases of the grooves free of electrode metal. Another way of reducing the capacitance is to use a lightly doped N-type substrate with a heavily doped P-type surface layer functioning as source, the groove extending through this layer. In another modification the oxide insulant is absent from the bases of the grooves which are covered with a silicon nitride layer which also extends over the oxide on the groove walls. This layer can break down reversibly to short the gate to the source at voltages less than the breakdown voltage of the gate insulation proper and thus fulfils a protective function. In yet another arrangement which enables several devices with mutually isolated sources to be formed in a single body the substrate is again of N-type with diffused P-type inclusions constituting the sources which can be contacted at the bases of etched grooves. Finally the vertical walls of the grooves may be replaced by inclined walls, resulting in some cases in V-shaped grooves, by orientating the substrate surface in a 100 plane and using hydrazine hydrate to etch the grooves.
GB1010068A 1968-03-01 1968-03-01 Method of making insulated gate field effect transistors Expired GB1248051A (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
GB1010068A GB1248051A (en) 1968-03-01 1968-03-01 Method of making insulated gate field effect transistors
NL6902936A NL6902936A (en) 1968-03-01 1969-02-25
DE19691910297 DE1910297A1 (en) 1968-03-01 1969-02-28 Insulated gate field effect transistor and process for its manufacture
FR6905631A FR2003068A7 (en) 1968-03-01 1969-03-03

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB1010068A GB1248051A (en) 1968-03-01 1968-03-01 Method of making insulated gate field effect transistors

Publications (1)

Publication Number Publication Date
GB1248051A true GB1248051A (en) 1971-09-29

Family

ID=9961500

Family Applications (1)

Application Number Title Priority Date Filing Date
GB1010068A Expired GB1248051A (en) 1968-03-01 1968-03-01 Method of making insulated gate field effect transistors

Country Status (4)

Country Link
DE (1) DE1910297A1 (en)
FR (1) FR2003068A7 (en)
GB (1) GB1248051A (en)
NL (1) NL6902936A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3324017A1 (en) * 1982-07-05 1984-01-05 Matsushita Electronics Corp., Kadoma, Osaka Insulating-layer field-effect transistor

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2106540A1 (en) * 1970-02-13 1971-08-19 Texas Instruments Inc Semiconductor circuits and processes for their manufacture
DE2619713C2 (en) * 1976-05-04 1984-12-20 Siemens AG, 1000 Berlin und 8000 München Semiconductor memory
US5124764A (en) * 1986-10-21 1992-06-23 Texas Instruments Incorporated Symmetric vertical MOS transistor with improved high voltage operation
US5160491A (en) * 1986-10-21 1992-11-03 Texas Instruments Incorporated Method of making a vertical MOS transistor
US5016067A (en) * 1988-04-11 1991-05-14 Texas Instruments Incorporated Vertical MOS transistor
US5016068A (en) * 1988-04-15 1991-05-14 Texas Instruments Incorporated Vertical floating-gate transistor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3324017A1 (en) * 1982-07-05 1984-01-05 Matsushita Electronics Corp., Kadoma, Osaka Insulating-layer field-effect transistor

Also Published As

Publication number Publication date
DE1910297A1 (en) 1969-11-13
FR2003068A7 (en) 1969-11-07
NL6902936A (en) 1969-09-03

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