GB1162565A - Improvements in and relating to Semiconductor Structures - Google Patents
Improvements in and relating to Semiconductor StructuresInfo
- Publication number
- GB1162565A GB1162565A GB1597467A GB1597467A GB1162565A GB 1162565 A GB1162565 A GB 1162565A GB 1597467 A GB1597467 A GB 1597467A GB 1597467 A GB1597467 A GB 1597467A GB 1162565 A GB1162565 A GB 1162565A
- Authority
- GB
- United Kingdom
- Prior art keywords
- semi
- layers
- conductor
- devices
- wafer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/761—PN junctions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8221—Three dimensional integrated circuits stacked in different levels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Element Separation (AREA)
Abstract
1,162,565. Semi-conductor devices. IBM UNITED KINGDOM Ltd. 7 April, 1967, No. 15974/67. Heading H1K. A semi-conductor structure comprises a wafer having an isolating barrier electrically separating the opposite major surfaces and semiconductor devices formed in both major surfaces of the wafer. The isolating barrier may be a pair of PN junctions or one or more layers of insulating material. The structure may comprise an integrated circuit, or may comprise a plurality of individual devices which are separated into dice, each having a device on both faces to increase the yield of satisfactory units. In a first embodiment, N-type silicon epitaxial layers are grown on both faces of a P-type silicon substrate and P-type isolating regions are diffused through the epitaxial layers to divide them into regions in each of which a transistor, diode, resistor or other component may be produced. The transistors may be provided with highly conductive sub-collector regions by diffusing N+ type regions into the substrate before the epitaxial deposition. In a second embodiment, insulating layers of silicon carbide (SiC) are epitaxially grown on both faces of a semi-conductor wafer, layers of semi-conductor material are epitaxially grown on the SiC layers, channels are etched through the grown semi-conductor layers and are lined with insulating material, e.g. epitaxially grown SiC, or completely filled with dielectric material. Transistors and/or other devices are then formed in the isolated islands. In a first modification, the central isolation is provided by PN junctions and the lateral isolation is provided by channels filled with insulation material. In a second modification a layer of SiC and a semi-conductor layer are epitaxially deposited on only one face of a substrate, the devices being formed in the substrate and in the epitaxial semi-conductor layer. If a plurality of individual opposed pairs of devices are to be produced by dicing the wafer the lateral isolation is omitted. The structures can be contacted by mounting one face on a printed circuit and applying flying leads to the opposite face. A metallization pattern may be deposited simultaneously on both faces of the wafer.
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1597467A GB1162565A (en) | 1967-04-07 | 1967-04-07 | Improvements in and relating to Semiconductor Structures |
FR1559209D FR1559209A (en) | 1967-04-07 | 1968-02-23 | |
CH381568A CH468080A (en) | 1967-04-07 | 1968-03-13 | Semiconductor device |
DE19681764106 DE1764106A1 (en) | 1967-04-07 | 1968-04-03 | Semiconductor device |
NL6804786A NL6804786A (en) | 1967-04-07 | 1968-04-04 | |
BE713333D BE713333A (en) | 1967-04-07 | 1968-04-05 | |
SE464568A SE331720B (en) | 1967-04-07 | 1968-04-05 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB1597467A GB1162565A (en) | 1967-04-07 | 1967-04-07 | Improvements in and relating to Semiconductor Structures |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1162565A true GB1162565A (en) | 1969-08-27 |
Family
ID=10068943
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB1597467A Expired GB1162565A (en) | 1967-04-07 | 1967-04-07 | Improvements in and relating to Semiconductor Structures |
Country Status (7)
Country | Link |
---|---|
BE (1) | BE713333A (en) |
CH (1) | CH468080A (en) |
DE (1) | DE1764106A1 (en) |
FR (1) | FR1559209A (en) |
GB (1) | GB1162565A (en) |
NL (1) | NL6804786A (en) |
SE (1) | SE331720B (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4028149A (en) * | 1976-06-30 | 1977-06-07 | Ibm Corporation | Process for forming monocrystalline silicon carbide on silicon substrates |
US4161743A (en) * | 1977-03-28 | 1979-07-17 | Tokyo Shibaura Electric Co., Ltd. | Semiconductor device with silicon carbide-glass-silicon carbide passivating overcoat |
US4224636A (en) * | 1975-12-24 | 1980-09-23 | Tokyo Shibaura Electric Co., Ltd. | Semiconductor device with thermally compensating SiO2 -silicate glass-SiC passivation layer |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6143582A (en) | 1990-12-31 | 2000-11-07 | Kopin Corporation | High density electronic circuit modules |
US5376561A (en) * | 1990-12-31 | 1994-12-27 | Kopin Corporation | High density electronic circuit modules |
US6627953B1 (en) | 1990-12-31 | 2003-09-30 | Kopin Corporation | High density electronic circuit modules |
-
1967
- 1967-04-07 GB GB1597467A patent/GB1162565A/en not_active Expired
-
1968
- 1968-02-23 FR FR1559209D patent/FR1559209A/fr not_active Expired
- 1968-03-13 CH CH381568A patent/CH468080A/en unknown
- 1968-04-03 DE DE19681764106 patent/DE1764106A1/en active Pending
- 1968-04-04 NL NL6804786A patent/NL6804786A/xx unknown
- 1968-04-05 BE BE713333D patent/BE713333A/xx unknown
- 1968-04-05 SE SE464568A patent/SE331720B/xx unknown
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4224636A (en) * | 1975-12-24 | 1980-09-23 | Tokyo Shibaura Electric Co., Ltd. | Semiconductor device with thermally compensating SiO2 -silicate glass-SiC passivation layer |
US4028149A (en) * | 1976-06-30 | 1977-06-07 | Ibm Corporation | Process for forming monocrystalline silicon carbide on silicon substrates |
US4161743A (en) * | 1977-03-28 | 1979-07-17 | Tokyo Shibaura Electric Co., Ltd. | Semiconductor device with silicon carbide-glass-silicon carbide passivating overcoat |
Also Published As
Publication number | Publication date |
---|---|
FR1559209A (en) | 1969-03-07 |
DE1764106A1 (en) | 1971-05-06 |
SE331720B (en) | 1971-01-11 |
NL6804786A (en) | 1968-10-08 |
CH468080A (en) | 1969-01-31 |
BE713333A (en) | 1968-08-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PS | Patent sealed | ||
PCNP | Patent ceased through non-payment of renewal fee |