DE2838982B2 - Verfahren zum Herstellen von Mehrebenen-Leiterplatten - Google Patents

Verfahren zum Herstellen von Mehrebenen-Leiterplatten

Info

Publication number
DE2838982B2
DE2838982B2 DE19782838982 DE2838982A DE2838982B2 DE 2838982 B2 DE2838982 B2 DE 2838982B2 DE 19782838982 DE19782838982 DE 19782838982 DE 2838982 A DE2838982 A DE 2838982A DE 2838982 B2 DE2838982 B2 DE 2838982B2
Authority
DE
Germany
Prior art keywords
conductor
conductor tracks
levels
circuit boards
printed circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19782838982
Other languages
German (de)
English (en)
Other versions
DE2838982A1 (de
Inventor
Klaus-Peter 7530 Pforzheim Kreft
Siegfried 7251 Wimsheim Schlag
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent Deutschland AG
Original Assignee
Standard Elektrik Lorenz AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Elektrik Lorenz AG filed Critical Standard Elektrik Lorenz AG
Priority to DE19782838982 priority Critical patent/DE2838982B2/de
Priority to GB7929756A priority patent/GB2030781B/en
Priority to SE7907298A priority patent/SE7907298L/xx
Priority to NL7906603A priority patent/NL7906603A/nl
Priority to BE2/58053A priority patent/BE878645A/nl
Priority to FR7922427A priority patent/FR2447131A1/fr
Priority to ES483975A priority patent/ES483975A1/es
Publication of DE2838982A1 publication Critical patent/DE2838982A1/de
Priority to BE2/58599A priority patent/BE883783R/fr
Publication of DE2838982B2 publication Critical patent/DE2838982B2/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661—Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01—Dielectrics
    • H05K2201/0104—Properties and characteristics in general
    • H05K2201/0133—Elastomeric or compliant polymer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
DE19782838982 1978-09-07 1978-09-07 Verfahren zum Herstellen von Mehrebenen-Leiterplatten Ceased DE2838982B2 (de)

Priority Applications (8)

Application Number Priority Date Filing Date Title
DE19782838982 DE2838982B2 (de) 1978-09-07 1978-09-07 Verfahren zum Herstellen von Mehrebenen-Leiterplatten
GB7929756A GB2030781B (en) 1978-09-07 1979-08-28 Multilayer printed circuit
SE7907298A SE7907298L (sv) 1978-09-07 1979-09-03 Forfarande for framstellning av tryckta kretskort med flera skikt
NL7906603A NL7906603A (nl) 1978-09-07 1979-09-04 Werkwijze voor het vervaardigen van een printplaat bestaande uit meerdere lagen.
BE2/58053A BE878645A (nl) 1978-09-07 1979-09-07 Vervaardigingswerkwijze voor meerlagige gedrukte stroomloopkaarten
FR7922427A FR2447131A1 (fr) 1978-09-07 1979-09-07 Procede de fabrication de plaquettes a circuits imprimes multi-couches
ES483975A ES483975A1 (es) 1978-09-07 1979-09-07 Un proceso para fabricar tarjetas de circuito impreso multi-capas
BE2/58599A BE883783R (fr) 1978-09-07 1980-06-12 Vervaardigingswerkwijze voor meerlagige gedrukte stroomloopkaarten

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782838982 DE2838982B2 (de) 1978-09-07 1978-09-07 Verfahren zum Herstellen von Mehrebenen-Leiterplatten

Publications (2)

Publication Number Publication Date
DE2838982A1 DE2838982A1 (de) 1980-03-20
DE2838982B2 true DE2838982B2 (de) 1980-09-18

Family

ID=6048893

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19782838982 Ceased DE2838982B2 (de) 1978-09-07 1978-09-07 Verfahren zum Herstellen von Mehrebenen-Leiterplatten

Country Status (7)

Country Link
BE (1) BE878645A (fr)
DE (1) DE2838982B2 (fr)
ES (1) ES483975A1 (fr)
FR (1) FR2447131A1 (fr)
GB (1) GB2030781B (fr)
NL (1) NL7906603A (fr)
SE (1) SE7907298L (fr)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987003164A1 (fr) * 1985-11-15 1987-05-21 Leeb Karl Erik Dispositif et procede utilises dans la fabrication de cartes a circuit
DE3800890A1 (de) * 1987-01-14 1988-07-28 Kollmorgen Corp Mehrebenen-schaltungsplatte und verfahren zu deren herstellung
DE4237611A1 (de) * 1992-11-09 1994-05-11 Lueberg Elektronik Gmbh & Co R Verfahren zur Herstellung von Leiterplatten

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4715894A (en) * 1985-08-29 1987-12-29 Techno Instruments Investments 1983 Ltd. Use of immersion tin and tin alloys as a bonding medium for multilayer circuits
US4816070A (en) * 1985-08-29 1989-03-28 Techo Instruments Investments Ltd. Use of immersion tin and alloys as a bonding medium for multilayer circuits
JPS6276600A (ja) * 1985-09-29 1987-04-08 株式会社　アサヒ化学研究所 基板に導電回路を形成する方法
GB8630392D0 (en) * 1986-12-19 1987-01-28 Prestwick Circuits Ltd Producing printed circuit boards
JPH03196691A (ja) * 1989-12-26 1991-08-28 Cmk Corp プリント配線板の絶縁層の形成方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB892451A (en) * 1957-12-03 1962-03-28 Radio And Allied Ind Ltd Improvements in and relating to the manufacture of printed circuits
US3349162A (en) * 1965-08-23 1967-10-24 Automatic Elect Lab Intra-connection techniques for multilayer printed wiring boards
DE1924775B2 (de) * 1969-05-14 1971-06-09 Verfahren zur herstellung einer leiterplatte
GB1310880A (en) * 1969-06-13 1973-03-21 Microponent Dev Ltd Multi-layer printed circuit board assemblies

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987003164A1 (fr) * 1985-11-15 1987-05-21 Leeb Karl Erik Dispositif et procede utilises dans la fabrication de cartes a circuit
DE3800890A1 (de) * 1987-01-14 1988-07-28 Kollmorgen Corp Mehrebenen-schaltungsplatte und verfahren zu deren herstellung
DE4237611A1 (de) * 1992-11-09 1994-05-11 Lueberg Elektronik Gmbh & Co R Verfahren zur Herstellung von Leiterplatten

Also Published As

Publication number Publication date
GB2030781A (en) 1980-04-10
ES483975A1 (es) 1980-04-01
DE2838982A1 (de) 1980-03-20
BE878645A (nl) 1980-03-07
NL7906603A (nl) 1980-03-11
GB2030781B (en) 1982-10-13
FR2447131A1 (fr) 1980-08-14
SE7907298L (sv) 1980-03-08

Similar Documents

Publication Publication Date Title
DE4125879C2 (de) Leiterplatten und Verfahren zu ihrer Herstellung
DE68909853T2 (de) Verfahren und Film zur Herstellung von gedruckten Schaltungsplatten.
DE3545989C2 (fr)
DE69934379T2 (de) Verbundmaterial zur Verwendung in der Herstellung von gedruckten Leiterplatten
DE3408630A1 (de) Verfahren und schichtmaterial zur herstellung durchkontaktierter elektrischer leiterplatten
DE3700910A1 (de) Verfahren zum aufbau elektrischer schaltungen auf einer grundplatte
DE3211025C2 (fr)
DE4320316C1 (de) Leiterplatte, Mehrlagenleiterplatte-Innenlage und Mehrlagenleiterplatte sowie Verfahren zur Herstellung derselben
DE3008143C2 (de) Verfahren zum Herstellen von gedruckten Leiterplatten mit Lochungen, deren Wandungen metallisiert sind
DE2838982B2 (de) Verfahren zum Herstellen von Mehrebenen-Leiterplatten
DE2251829A1 (de) Verfahren zur herstellung metallisierter platten
DE1142926B (de) Verfahren zur Herstellung gedruckter Schaltungsplatten
DE1665374B1 (de) Basismaterial aus isolierstoff zum herstellen gedruckter leiterplatten
EP0282078B1 (fr) Procédé de fabrication d'un circuit électrique comportant un noyau métallique et matériau de base utilisé
DE2515875A1 (de) Gedruckte schaltung und verfahren zu ihrer herstellung
EP0016952B1 (fr) Procédé de fabrication de plaquettes à circuits imprimés pourvues d'une couche protectrice
DE3006117C2 (de) Verfahren zum Herstellen von Leiterplatten mit mindestens zwei Leiterzugebenen
EP3657914A1 (fr) Plaque de circuit imprimé pour module led et méthode de sa manufacture
DE1665395B1 (de) Verfahren zur herstellung gedruckter leiterplatten
DE2014138A1 (de) Verfahren zur Herstellung von gedruckten Leiterplatten
DE2809013A1 (de) Mit bauelementen bestueckte leiterplatte und verfahren zu deren herstellung
CH639516A5 (de) Mit bauelementen bestueckte leiterplatte und verfahren zu deren herstellung.
DE3427015C2 (fr)
DE2445803B2 (de) Verfahren zum Herstellen von Leiterplatten
DE4130121C2 (de) Verfahren zum Herstellen von Leiterplatten, bei denen die Bauelementanschlußflächen mit lötfähigen Metallschichten versehen sind

Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
8235 Patent refused