GB2030781A - Multilayer printed circuit - Google Patents

Multilayer printed circuit Download PDF

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Publication number
GB2030781A
GB2030781A GB7929756A GB7929756A GB2030781A GB 2030781 A GB2030781 A GB 2030781A GB 7929756 A GB7929756 A GB 7929756A GB 7929756 A GB7929756 A GB 7929756A GB 2030781 A GB2030781 A GB 2030781A
Authority
GB
United Kingdom
Prior art keywords
planes
printed circuit
interconnections
produced
interconnection
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
GB7929756A
Other versions
GB2030781B (en
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Publication of GB2030781A publication Critical patent/GB2030781A/en
Application granted granted Critical
Publication of GB2030781B publication Critical patent/GB2030781B/en
Expired legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4661Adding a circuit layer by direct wet plating, e.g. electroless plating; insulating materials adapted therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/01Dielectrics
    • H05K2201/0104Properties and characteristics in general
    • H05K2201/0133Elastomeric or compliant polymer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/10Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/108Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by semi-additive methods; masks therefor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/425Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
    • H05K3/426Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/40Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42Plated through-holes or plated via connections
    • H05K3/429Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/465Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits by applying an insulating layer having channels for the next circuit layer

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

A method of fabricating a multilayer printed circuit board in which a glass fibre reinforced epoxy resin sheet 1, clad on both sides with copper foil 2, 3 is first processed to form a double sided printed circuit board. The two sides are then covered with thin films 4, 5 of partially cured adhesive rubber material. The adhesive layers are processed and provided with separate conductor patterns 6, 7 in known manner. The adhesive layers and conductor patterns are repeated until the requisite number have been provided. Interconnecting holes are then formed and plated through in known manner. Finally the whole structure is post cured. <IMAGE>

Description

SPECIFICATION Multilayer printed circuit This invention relates to the manufacture of multilayer printed circuit boards.
A well-known method of fabricating multilayer printed circuits is disclosed in British Patent Specification No. 91 1,71#, in which a plurality of individual sheets of insulating material each having a printed circuit pattern thereon are bonded together, holes are formed through the bonded structure and subsequently electro-plated to effect interconnections between the patterns on the various sheets.
This method of manufacturing multilayer printed circuit boards starts from a non-metallized base material with holes at the points of interconnection among the conductors of various interconnection planes. Thereupon, by electroless metal deposition, there are produced the interconnections of the two first planes, the walls of the holes being metallized simultaneously, thus establishing the interconnections among the conductors of the planes.
The thus-produced printed circuit board is then coated with a layer of insulating material, with the plated through holes left free. Subsequently thereto, and exclusively by electroless metal deposition, the conductors of the next interconnection planes are produced on this layer of insulating material. In another example of the conventional process, no holes are provided for interconnecting the conductors of various interconnection planes, but merely contact areas which are left free when deposit ing the layer of insulating material.
This above process of manufacturing multilayer printed circuit boards, however, is too expensive to permit multilayer-printed circuit boards to be used for many practical applications. Above all, this is due to the fact that it is comparatively expensive to produce the interconnections by way of electroless metal deposition.
Moreover, the through-connections between the conductors of various interconnection planes established by electroless deposition of metals, tend to have poor reliability, especially when subjected to thermal stress, because copper deposited electroless has a poor bond strength .
It is an object of the invention to provide a process of manufacturing multilayer printed circuit boards whereby it is possible to produce multilayer printed circuit boards, especially ones with three or four planes, of good quality.
According to the present invention there is provided a method of fabricating a multilayer printed circuit board comprising the steps of printing the image of and etching a first conductor pattern on a metal clad insulative sheet, coating the first pattern with a layer of adhesive material, treating the adhesive material to promote the adhesion of electroless plated metal, electrolessly plating metal onto the treated adhesive layer, printing the image of a second conductor pattern, electroplating metal onto the image of the second conductor pattern, and etching electroless metal from the area not covered by the pattern image, and forming plated through interconnection holes.
In a preferred embodiment the insulative sheet is clad on both sides with metal and each side has first and second circuit patterns formed thereon by the method described above. Further circuit patterns can be formed on either or both sides by repeating as often as required the steps of coating with adhesive material, treating the adhesive material, electroless plating the treated material, and printing electroplating and etching to form a circuit pattern before finally forming the interconnection holes.
According to the invention, there is further provided a method of manufacturing multilayer printed circuit boards having two or more interconnection planes and interconnections among the connections of various interconnection planes, in which method in the first place the interconnections of the first or the first two planes are produced on the surface of a base material, whereupon the one or more planes thus provided with interconnections are covered with a layer of insulating material, with the printed conductors corresponding to the desired interconnection pattern of the next planes being produced, both the printed conductors and the interconnections among the printed conductors being produced simultaneously, in which the interconnections of the two first (internal) sandwiched interconnection planes are produced by etching a coppercoated base material, whereupon these interconnection planes are coated throughout their entire surfaces with a layer of insulating material, and the boreholes are produced, with the interconnections of the further interconnection planes then being produced by employing the so-called semi-additive method.
An embodiment of the invention will now be described with reference to the accompanying drawing which illustrates a cross-section through a multilayer printed circuit board.
The starting material for the multilayer printed circuit board is a conventional dielectric substrate 1 clad on both sides with metal foil 2, 3. Typically the substrate is a glass fibre reinforced epoxy resin system and the metal foil is copper. The dielectric substrate may be, say, 1250 microns and the copper cladding 50 microns thick. The metal foils 2, 3 are then coated with photo resist, printed with circuit pattern images and etched to leave conventional printed circuit patterns. After these patterns have been cleaned the board is covered on both sides with thin adhesive layers 4, 5 e.g. of partially cured butadiene rubber film approximately 50 microns in thickness. The adhesive layers are treated to make them micro-porous and/or wettable and then coated with a plating photoresist.Circuit patterns are then imaged onto the resists, the resists are developed and electroless copper is deposited to form the circuit patterns. After the electroless copper patterns have been deposited additional copper is electroplated onto the patterns 6, 7 until the conductor thickness is approximately 50 microns. Further patterns 8, 9 may be formed by repeating the steps of applying adhesive layers 10, 11 etc. until the required.
When all the required circuit patterns have been formed in electroplated copper the necessary inter connection holes (not shown) are made and plated through in accordance with known techniques. Finally the whole structure is post cured.
It is apparent that the thicknesses given may be varied according to the requirements of the circuits.
It is apparent that screen printing techniques may be used instead of the aforementioned photomechanical technique for the imaging purposes.
It is also possible to replace the semi cured butadiene rubber by a liquid adhesive system which may be applied by several coating methods, e.g. silk screen or curtain coating applications. The liquid adhesive may be partially cured before formation of a metal pattern thereon.
Further details of the present method will now be described.
The "core" of the multilayer printed circuit board consists of a circuit etched on one or two sides, made from a base material (epoxy glass, epoxy paper, phenolic resin paper) which is copper-coated on one or on both sides, by conventional printing and etching processes. The interconnections of the core are oxidized in safeguard a sufficient adhesion between the copper and the layer of insulating material to be subsequently deposited thereon. Thereupon, the printed circuit board, by dipping, casting, roller-coating or screen printing, is coated with a liquid plastics material, the so-called coupling agent. Electrostatic powder coating with epoxy resin as well as laminating prepreg coupling agent foils are also suitable for this purpose.The thickness of the layer of insulating material depends on the isolation values to be achieved and may vary from 30 to about 100 microns.
For the layer of insulating material we preferably use either the acrylo-nitrile-butad iene- phenolic resin compounds as known from the fields of the semi-additive technique, or other plastics materials suitable for employing the semi-additive technique.
Following the coating with the insulating material, there is carried out a thermal treatment to achieve a certain degree of cure of the insulating material.
When using an acrylo-nitrile-butadiene-phenolic resin coupling agent foil applied by a socalled hot-roll laminator, we prefer to heat to a temperature of 1 60 C for 2 hours.
The printed circuit board coated with the layer of insulating material is then further processed by the well known steps of the semi-additive technique: (a) Drilling or punching the pc board (b) Subjecting the layer of insulating material to chrome-sulphuric acid treatment (c) Chemical copper plating (d) Negative conductor pattern printing (e) Galvanic setup of the interconnections and boreholes of copper (f) Removing the conductor pattern printing (g) Etching of the conductor pattern.
Further steps of the process, such as the fusing thereon of tin/lead coatings and/or the printing of solder stop lacquer or insulating lacquer and/or the printing of servicing or assembling instructions are likewise applicable.
Although the example of embodiment is restricted to multilayer printed circuit boards comprising three or four layers, the practical application of the process according to the invention can be equally well employed for manufacturing multilayer printed circuit boards comprising more than four interconnection planes.

Claims (12)

1. A method of fabricating a multilayer printed circuit board comprising the steps of printing the image of and etching a first conductor pattern on a metal clad insulative sheet, coating the first pattern with a layer of adhesive material, treating the adhesive material to promote the adhesion of electroless plated metal, electrolessly plating metal onto the treated adhesive layer, printing the image of a second conductor pattern, electroplating metal onto the image of the second conductor pattern, and etching electroless metal from the area not covered by the second pattern image, and forming plated through interconnection holes.
2. A method according to claim 1 wherein the insulative sheet is clad on both sides with metal and each side has first and second circuit patterns formed thereon.
3. A method according to claim 1 or 2 wherein further circuit patterns are provided or either or both sides of the insulative sheet by repeating the steps of coating with a of adhesive material and then forming the circuit pattern(s) thereon.
4. A method according to any preceding claim wherein the substrate is a glass fibre reinforced epoxy resin system.
5. A method according to any preceding claim wherein the metal of the circuit patterns is copper.
6. A method according to any preceding claim wherein the adhesive material is partially cured butadiene rubber.
7. A method according to any one of claims 1 to 5 wherein the adhesive layer is applied in liquid form and subjected to further curing operation.
8. A method of manufacturing multilayer printed circuit boards having two or more interconnection planes and interconnections among the connections of various interconnection planes, in which method in the first place the interconnections of the first or the first two planes are produced on the surface of a base material, whereupon the one or more planes thus provided with interconnections are covered with a layer of insulating material, with the printed conductors corresponding to the desired interconnection pattern of the next planes being produced, both the printed conductors and the interconnections among the printed conductors being produced simultaneously, in which the interconnections of the two first (internal) sandwiched interconnection planes are produced by etching a copper-coated base material, whereupon these interconnection planes are coated throughout their entire surfaces with a layer of insulating material, and the boreholes are produced, with the interconnections of the further interconnection planes then being produced by employing the so-called semi-additive method.
9. A method as claimed in claim 8, wherein the one or more layers of insulating material are produced from a liquid or powdered material by way of casting, dipping or powder-coating.
10. A method as claimed in claim 8, wherein said one or more layers of insulating material are deposited in the form of a foil.
11. A method of fabricating a multilayer printed circuit board substantially as described with reference to the accompanying drawing.
12. A multilayer printed circuit board fabricated by the method of any preceding claim.
GB7929756A 1978-09-07 1979-08-28 Multilayer printed circuit Expired GB2030781B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19782838982 DE2838982B2 (en) 1978-09-07 1978-09-07 Method of manufacturing multilevel printed circuit boards

Publications (2)

Publication Number Publication Date
GB2030781A true GB2030781A (en) 1980-04-10
GB2030781B GB2030781B (en) 1982-10-13

Family

ID=6048893

Family Applications (1)

Application Number Title Priority Date Filing Date
GB7929756A Expired GB2030781B (en) 1978-09-07 1979-08-28 Multilayer printed circuit

Country Status (7)

Country Link
BE (1) BE878645A (en)
DE (1) DE2838982B2 (en)
ES (1) ES483975A1 (en)
FR (1) FR2447131A1 (en)
GB (1) GB2030781B (en)
NL (1) NL7906603A (en)
SE (1) SE7907298L (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0216531A1 (en) * 1985-08-29 1987-04-01 Techno Instruments Investments 1983 Ltd. Use of immersion tin and tin alloys as a bonding medium for multilayer circuits
WO1987003164A1 (en) * 1985-11-15 1987-05-21 Leeb Karl Erik Means for use in manufacturing circuit cards and method for manufacturing the means
EP0275686A1 (en) * 1986-12-19 1988-07-27 Prestwick Circuits Limited Improved multi-layer printed circuit boards, and methods of manufacturing such boards
US4816070A (en) * 1985-08-29 1989-03-28 Techo Instruments Investments Ltd. Use of immersion tin and alloys as a bonding medium for multilayer circuits
GB2240221A (en) * 1989-12-26 1991-07-24 Nippon Cmk Kk Method of forming an insulating layer on a printed circuit board

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6276600A (en) * 1985-09-29 1987-04-08 株式会社 アサヒ化学研究所 Forming method for conductive circuit on substrate
US4804575A (en) * 1987-01-14 1989-02-14 Kollmorgen Corporation Multilayer printed wiring boards
DE4237611A1 (en) * 1992-11-09 1994-05-11 Lueberg Elektronik Gmbh & Co R Circuit board prodn. and circuit board - uses further layer of resin-impregnated fabric to cover conductive paths formed on composite baseboard

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB892451A (en) * 1957-12-03 1962-03-28 Radio And Allied Ind Ltd Improvements in and relating to the manufacture of printed circuits
US3349162A (en) * 1965-08-23 1967-10-24 Automatic Elect Lab Intra-connection techniques for multilayer printed wiring boards
DE1924775B2 (en) * 1969-05-14 1971-06-09 METHOD OF MANUFACTURING A CIRCUIT BOARD
GB1310880A (en) * 1969-06-13 1973-03-21 Microponent Dev Ltd Multi-layer printed circuit board assemblies

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0216531A1 (en) * 1985-08-29 1987-04-01 Techno Instruments Investments 1983 Ltd. Use of immersion tin and tin alloys as a bonding medium for multilayer circuits
US4715894A (en) * 1985-08-29 1987-12-29 Techno Instruments Investments 1983 Ltd. Use of immersion tin and tin alloys as a bonding medium for multilayer circuits
US4816070A (en) * 1985-08-29 1989-03-28 Techo Instruments Investments Ltd. Use of immersion tin and alloys as a bonding medium for multilayer circuits
WO1987003164A1 (en) * 1985-11-15 1987-05-21 Leeb Karl Erik Means for use in manufacturing circuit cards and method for manufacturing the means
EP0275686A1 (en) * 1986-12-19 1988-07-27 Prestwick Circuits Limited Improved multi-layer printed circuit boards, and methods of manufacturing such boards
GB2240221A (en) * 1989-12-26 1991-07-24 Nippon Cmk Kk Method of forming an insulating layer on a printed circuit board
GB2240221B (en) * 1989-12-26 1994-03-30 Nippon Cmk Kk Improvements relating to multi-layer printed circuit boards

Also Published As

Publication number Publication date
ES483975A1 (en) 1980-04-01
DE2838982A1 (en) 1980-03-20
BE878645A (en) 1980-03-07
DE2838982B2 (en) 1980-09-18
NL7906603A (en) 1980-03-11
GB2030781B (en) 1982-10-13
FR2447131A1 (en) 1980-08-14
SE7907298L (en) 1980-03-08

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PCNP Patent ceased through non-payment of renewal fee