DE2747384C2 - Datenverarbeitungseinheit mit Einrichtung zur Prüfung des Verarbeitungsabschnitts - Google Patents

Datenverarbeitungseinheit mit Einrichtung zur Prüfung des Verarbeitungsabschnitts

Info

Publication number
DE2747384C2
DE2747384C2 DE2747384A DE2747384A DE2747384C2 DE 2747384 C2 DE2747384 C2 DE 2747384C2 DE 2747384 A DE2747384 A DE 2747384A DE 2747384 A DE2747384 A DE 2747384A DE 2747384 C2 DE2747384 C2 DE 2747384C2
Authority
DE
Germany
Prior art keywords
control
circuit section
register
blanking
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2747384A
Other languages
German (de)
English (en)
Other versions
DE2747384A1 (de
Inventor
Hiromu Sagamihara Kanagawa Hayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE2747384A1 publication Critical patent/DE2747384A1/de
Application granted granted Critical
Publication of DE2747384C2 publication Critical patent/DE2747384C2/de
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/317—Testing of digital circuits
    • G01R31/3181—Functional testing
    • G01R31/3185—Reconfiguring for testing, e.g. LSSD, partitioning
    • G01R31/318533—Reconfiguring for testing, e.g. LSSD, partitioning using scanning techniques, e.g. LSSD, Boundary Scan, JTAG
    • G01R31/318572—Input/Output interfaces
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/22—Means for limiting or controlling the pin/gate ratio

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
  • Microcomputers (AREA)
  • Tests Of Electronic Circuits (AREA)
DE2747384A 1976-10-22 1977-10-21 Datenverarbeitungseinheit mit Einrichtung zur Prüfung des Verarbeitungsabschnitts Expired DE2747384C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP12709876A JPS5352029A (en) 1976-10-22 1976-10-22 Arithmetic circuit unit

Publications (2)

Publication Number Publication Date
DE2747384A1 DE2747384A1 (de) 1978-04-27
DE2747384C2 true DE2747384C2 (de) 1983-03-31

Family

ID=14951527

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2747384A Expired DE2747384C2 (de) 1976-10-22 1977-10-21 Datenverarbeitungseinheit mit Einrichtung zur Prüfung des Verarbeitungsabschnitts

Country Status (5)

Country Link
US (1) US4167780A (US20030204162A1-20031030-M00001.png)
JP (1) JPS5352029A (US20030204162A1-20031030-M00001.png)
DE (1) DE2747384C2 (US20030204162A1-20031030-M00001.png)
FR (1) FR2368757A1 (US20030204162A1-20031030-M00001.png)
GB (1) GB1593674A (US20030204162A1-20031030-M00001.png)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2432175A1 (fr) * 1978-07-27 1980-02-22 Cii Honeywell Bull Procede pour tester un systeme logique et systeme logique pour la mise en oeuvre de ce procede
US4422141A (en) * 1979-07-30 1983-12-20 Bell Telephone Laboratories, Incorporated Microprocessor architecture for improved chip testability
US4320509A (en) * 1979-10-19 1982-03-16 Bell Telephone Laboratories, Incorporated LSI Circuit logic structure including data compression circuitry
US4414623A (en) * 1980-10-01 1983-11-08 Motorola, Inc. Dual deadman timer circuit
JPS57123455A (en) * 1981-01-23 1982-07-31 Nec Corp Instruction executing device
JPS5814265A (ja) * 1981-07-16 1983-01-27 Matsushita Electronics Corp ワンチツプマイクロコンピユ−タ
US4403287A (en) * 1981-08-24 1983-09-06 Bell Telephone Laboratories, Incorporated Microprocessor architecture having internal access means
JPS58121458A (ja) * 1981-12-09 1983-07-19 Fujitsu Ltd スキヤンアウト方式
JPS58105366A (ja) * 1981-12-16 1983-06-23 Fujitsu Ltd デバツグ機能を持つマイクロコンピユ−タ
US4485472A (en) * 1982-04-30 1984-11-27 Carnegie-Mellon University Testable interface circuit
JPS58225453A (ja) * 1982-06-25 1983-12-27 Fujitsu Ltd 診断回路の誤り検出方式
DE3241412A1 (de) * 1982-11-09 1984-05-10 Siemens AG, 1000 Berlin und 8000 München Vorrichtung zum testen eines hochintegrierten mikroprogramm-gesteuerten elektronischen bauteiles
US4511967A (en) * 1983-02-15 1985-04-16 Sperry Corporation Simultaneous load and verify of a device control store from a support processor via a scan loop
US4551838A (en) * 1983-06-20 1985-11-05 At&T Bell Laboratories Self-testing digital circuits
NO843375L (no) * 1983-10-06 1985-04-09 Honeywell Inf Systems Databehandlingssystem og fremgangsmaate til vedlikehold samt anrodning
JPS6155747A (ja) * 1984-08-28 1986-03-20 Toshiba Corp デ−タ転送制御回路を備えたデイジタル集積回路
JPH0440394Y2 (US20030204162A1-20031030-M00001.png) * 1986-01-29 1992-09-22
DE68926783T2 (de) * 1988-10-07 1996-11-28 Martin Marietta Corp Paralleler datenprozessor
US4980889A (en) * 1988-12-29 1990-12-25 Deguise Wayne J Multi-mode testing systems
US5153882A (en) * 1990-03-29 1992-10-06 National Semiconductor Corporation Serial scan diagnostics apparatus and method for a memory device
JP2693631B2 (ja) * 1990-09-13 1997-12-24 富士通株式会社 スキャンアウト制御システム
US5321277A (en) * 1990-12-31 1994-06-14 Texas Instruments Incorporated Multi-chip module testing
US6073185A (en) * 1993-08-27 2000-06-06 Teranex, Inc. Parallel data processor
GB9417297D0 (en) * 1994-08-26 1994-10-19 Inmos Ltd Method and apparatus for testing an integrated circuit device
JPH10105426A (ja) * 1996-09-25 1998-04-24 Nec Ic Microcomput Syst Ltd 半導体集積回路
JPH11264854A (ja) * 1998-03-18 1999-09-28 Oki Electric Ind Co Ltd 半導体集積回路および半導体集積回路の試験方法
US6185667B1 (en) 1998-04-09 2001-02-06 Teranex, Inc. Input/output support for processing in a mesh connected computer
US6173388B1 (en) 1998-04-09 2001-01-09 Teranex Inc. Directly accessing local memories of array processors for improved real-time corner turning processing
US6067609A (en) * 1998-04-09 2000-05-23 Teranex, Inc. Pattern generation and shift plane operations for a mesh connected computer
US6212628B1 (en) 1998-04-09 2001-04-03 Teranex, Inc. Mesh connected computer

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3061192A (en) * 1958-08-18 1962-10-30 Sylvania Electric Prod Data processing system
GB1131085A (en) * 1966-03-25 1968-10-23 Secr Defence Improvements in or relating to the testing and repair of electronic digital computers
US3462742A (en) * 1966-12-21 1969-08-19 Rca Corp Computer system adapted to be constructed of large integrated circuit arrays
US3740722A (en) * 1970-07-02 1973-06-19 Modicon Corp Digital computer
US3702988A (en) * 1970-09-14 1972-11-14 Ncr Co Digital processor
US3793631A (en) * 1972-09-22 1974-02-19 Westinghouse Electric Corp Digital computer apparatus operative with jump instructions
US3832535A (en) * 1972-10-25 1974-08-27 Instrumentation Engineering Digital word generating and receiving apparatus
US3833888A (en) * 1973-02-05 1974-09-03 Honeywell Inf Systems General purpose digital processor for terminal devices
FR2250450A5 (US20030204162A1-20031030-M00001.png) * 1973-09-10 1975-05-30 Honeywell Bull Soc Ind
US3938098A (en) * 1973-12-26 1976-02-10 Xerox Corporation Input/output connection arrangement for microprogrammable computer
US3984813A (en) * 1974-10-07 1976-10-05 Fairchild Camera And Instrument Corporation Microprocessor system
US4086658A (en) * 1976-10-04 1978-04-25 International Business Machines Corporation Input/output and diagnostic arrangements for programmable machine controllers having multiprogramming capabilities

Also Published As

Publication number Publication date
GB1593674A (en) 1981-07-22
FR2368757B1 (US20030204162A1-20031030-M00001.png) 1982-12-10
JPS5352029A (en) 1978-05-12
FR2368757A1 (fr) 1978-05-19
US4167780A (en) 1979-09-11
JPS5541461B2 (US20030204162A1-20031030-M00001.png) 1980-10-24
DE2747384A1 (de) 1978-04-27

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Legal Events

Date Code Title Description
OAP Request for examination filed
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee