DE2657822A1 - Integrierte schaltung mit komplementaeren bipolaren transistoren - Google Patents

Integrierte schaltung mit komplementaeren bipolaren transistoren

Info

Publication number
DE2657822A1
DE2657822A1 DE19762657822 DE2657822A DE2657822A1 DE 2657822 A1 DE2657822 A1 DE 2657822A1 DE 19762657822 DE19762657822 DE 19762657822 DE 2657822 A DE2657822 A DE 2657822A DE 2657822 A1 DE2657822 A1 DE 2657822A1
Authority
DE
Germany
Prior art keywords
transistor
zone
integrated circuit
semiconductor layer
circuit according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE19762657822
Other languages
German (de)
English (en)
Other versions
DE2657822C2 (enExample
Inventor
Jean-Pierre Henri Biet
Michel De Brebisson
Jean-Michel Decrouen
Wolfgang Franz Joseph Edlinger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2657822A1 publication Critical patent/DE2657822A1/de
Application granted granted Critical
Publication of DE2657822C2 publication Critical patent/DE2657822C2/de
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/65—Integrated injection logic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/60—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D10/00 or H10D18/00, e.g. integration of BJTs
    • H10D84/641—Combinations of only vertical BJTs
    • H10D84/643—Combinations of non-inverted vertical BJTs and inverted vertical BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1408—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers
    • H10P32/1414—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase from or through or into an external applied layer, e.g. photoresist or nitride layers the applied layer being silicon, silicide or SIPOS, e.g. polysilicon or porous silicon
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages

Landscapes

  • Bipolar Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE19762657822 1975-12-29 1976-12-21 Integrierte schaltung mit komplementaeren bipolaren transistoren Granted DE2657822A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7539963A FR2337432A1 (fr) 1975-12-29 1975-12-29 Perfectionnement a la structure des circuits integres a transistors bipolaires complementaires et procede d'obtention

Publications (2)

Publication Number Publication Date
DE2657822A1 true DE2657822A1 (de) 1977-07-07
DE2657822C2 DE2657822C2 (enExample) 1989-10-05

Family

ID=9164256

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19762657822 Granted DE2657822A1 (de) 1975-12-29 1976-12-21 Integrierte schaltung mit komplementaeren bipolaren transistoren

Country Status (8)

Country Link
JP (1) JPS5283080A (enExample)
AU (1) AU506891B2 (enExample)
CH (1) CH609489A5 (enExample)
DE (1) DE2657822A1 (enExample)
FR (1) FR2337432A1 (enExample)
GB (1) GB1571621A (enExample)
NL (1) NL7614383A (enExample)
SE (1) SE7614560L (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5470781A (en) * 1977-11-16 1979-06-06 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device and its manufacture
US4338622A (en) * 1979-06-29 1982-07-06 International Business Machines Corporation Self-aligned semiconductor circuits and process therefor
US4539742A (en) * 1981-06-22 1985-09-10 Tokyo Shibaura Denki Kabushiki Kaisha Semiconductor device and method for manufacturing the same

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3624467A (en) * 1969-02-17 1971-11-30 Texas Instruments Inc Monolithic integrated-circuit structure and method of fabrication
DE2224574A1 (de) * 1971-05-22 1972-11-30 Philips Nv Integrierte Schaltung
DE2212168A1 (de) * 1972-03-14 1973-09-20 Ibm Deutschland Monolithisch integrierte halbleiterstruktur
DE2518010A1 (de) * 1974-04-26 1975-11-13 Western Electric Co Ic-halbleiterbauelement mit einer injektions-logikzelle

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3624467A (en) * 1969-02-17 1971-11-30 Texas Instruments Inc Monolithic integrated-circuit structure and method of fabrication
DE2224574A1 (de) * 1971-05-22 1972-11-30 Philips Nv Integrierte Schaltung
DE2212168A1 (de) * 1972-03-14 1973-09-20 Ibm Deutschland Monolithisch integrierte halbleiterstruktur
DE2518010A1 (de) * 1974-04-26 1975-11-13 Western Electric Co Ic-halbleiterbauelement mit einer injektions-logikzelle

Also Published As

Publication number Publication date
FR2337432B1 (enExample) 1979-06-22
JPS5514539B2 (enExample) 1980-04-17
FR2337432A1 (fr) 1977-07-29
JPS5283080A (en) 1977-07-11
AU506891B2 (en) 1980-01-24
CH609489A5 (en) 1979-02-28
AU2090976A (en) 1978-06-29
SE7614560L (sv) 1977-06-30
NL7614383A (nl) 1977-07-01
GB1571621A (en) 1980-07-16
DE2657822C2 (enExample) 1989-10-05

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Legal Events

Date Code Title Description
OD Request for examination
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee