DE2650865A1 - Verfahren zur herstellung einer halbleitervorrichtung - Google Patents

Verfahren zur herstellung einer halbleitervorrichtung

Info

Publication number
DE2650865A1
DE2650865A1 DE19762650865 DE2650865A DE2650865A1 DE 2650865 A1 DE2650865 A1 DE 2650865A1 DE 19762650865 DE19762650865 DE 19762650865 DE 2650865 A DE2650865 A DE 2650865A DE 2650865 A1 DE2650865 A1 DE 2650865A1
Authority
DE
Germany
Prior art keywords
substrate
dopant
areas
oxide layer
implemented
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19762650865
Other languages
German (de)
English (en)
Inventor
Tuh-Kai Koo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of DE2650865A1 publication Critical patent/DE2650865A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H10P30/212—Through-implantation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1404—Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00—Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10—Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171—Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/031—Manufacture or treatment of isolation regions comprising PN junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30—Isolation regions comprising PN junctions

Landscapes

  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE19762650865 1975-11-10 1976-11-06 Verfahren zur herstellung einer halbleitervorrichtung Pending DE2650865A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/630,490 US4001050A (en) 1975-11-10 1975-11-10 Method of fabricating an isolated p-n junction

Publications (1)

Publication Number Publication Date
DE2650865A1 true DE2650865A1 (de) 1977-05-18

Family

ID=24527389

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19762650865 Pending DE2650865A1 (de) 1975-11-10 1976-11-06 Verfahren zur herstellung einer halbleitervorrichtung

Country Status (7)

Country Link
US (1) US4001050A (enExample)
JP (1) JPS5260068A (enExample)
DE (1) DE2650865A1 (enExample)
FR (1) FR2331153A1 (enExample)
GB (1) GB1522269A (enExample)
IT (1) IT1067265B (enExample)
NL (1) NL7612257A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0052746A3 (en) * 1980-11-24 1983-03-16 Siemens Aktiengesellschaft Dynamic semiconductor memory cell with random access and method of making the same

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5250837A (en) * 1991-05-17 1993-10-05 Delco Electronics Corporation Method for dielectrically isolating integrated circuits using doped oxide sidewalls
US5250461A (en) * 1991-05-17 1993-10-05 Delco Electronics Corporation Method for dielectrically isolating integrated circuits using doped oxide sidewalls
US6509237B2 (en) * 2001-05-11 2003-01-21 Hynix Semiconductor America, Inc. Flash memory cell fabrication sequence
US6492710B1 (en) * 2001-06-07 2002-12-10 Cypress Semiconductor Corp. Substrate isolated transistor
US6905955B2 (en) * 2003-02-04 2005-06-14 Micron Technology, Inc. Methods of forming conductive connections, and methods of forming nanofeatures

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3717507A (en) * 1969-06-19 1973-02-20 Shibaura Electric Co Ltd Method of manufacturing semiconductor devices utilizing ion-implantation and arsenic diffusion
NL96608C (enExample) * 1969-10-03
BE759667A (fr) * 1969-12-01 1971-06-01 Philips Nv Procede permettant la fabrication d'un dispositif semiconducteur, et dispositif semiconducteur obtenu par la mise en oeuvre de ce procede
US3756861A (en) * 1972-03-13 1973-09-04 Bell Telephone Labor Inc Bipolar transistors and method of manufacture
US3856578A (en) * 1972-03-13 1974-12-24 Bell Telephone Labor Inc Bipolar transistors and method of manufacture
US3891480A (en) * 1973-10-01 1975-06-24 Honeywell Inc Bipolar semiconductor device construction
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0052746A3 (en) * 1980-11-24 1983-03-16 Siemens Aktiengesellschaft Dynamic semiconductor memory cell with random access and method of making the same

Also Published As

Publication number Publication date
JPS6156607B2 (enExample) 1986-12-03
JPS5260068A (en) 1977-05-18
IT1067265B (it) 1985-03-16
NL7612257A (nl) 1977-05-12
US4001050A (en) 1977-01-04
FR2331153A1 (fr) 1977-06-03
GB1522269A (en) 1978-08-23
FR2331153B1 (enExample) 1979-03-09

Similar Documents

Publication Publication Date Title
DE2718894C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung
DE2623009C2 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE2125303C3 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE2745857C2 (enExample)
DE1966237C3 (de) Verfahren zur Erhöhung des Gradienten von elektrisch aktiven Störstellenkonzentrationen
DE3002051C2 (enExample)
DE2534158A1 (de) Halbleiteraufbau und verfahren zu seiner herstellung
DE3312720C2 (enExample)
DE2641752B2 (de) Verfahren zur Herstellung eines Feldeffekttransistors
DE2517690A1 (de) Verfahren zum herstellen eines halbleiterbauteils
DE2449012A1 (de) Verfahren zur herstellung von dielektrisch isolierten halbleiterbereichen
DE2926334C2 (enExample)
DE2633714C2 (de) Integrierte Halbleiter-Schaltungsanordnung mit einem bipolaren Transistor und Verfahren zu ihrer Herstellung
DE1803024C3 (de) Verfahren zum Herstellen von Feldeffekttransistorbauelementen
DE1950069A1 (de) Verfahren zur Herstellung von Halbleitervorrichtungen
DE2225374B2 (de) Verfahren zum herstellen eines mos-feldeffekttransistors
DE69105621T2 (de) Herstellungsverfahren eines Kanals in MOS-Halbleiteranordnung.
DE3124283A1 (de) Halbleiteranordnung und verfahren zu dessen herstellung
EP0028786B1 (de) Ionenimplantationsverfahren
DE2650865A1 (de) Verfahren zur herstellung einer halbleitervorrichtung
EP0003330B1 (de) Verfahren zum Herstellen von hochintegrierten Halbleiteranordnungen mit aneinandergrenzenden, hochdotierten Halbleiterzonen entgegengesetzten Leitungstyps
DE2927227C2 (de) Verfahren zur Herstellung von Halbleiter-Bauelementen
DE2219696C3 (de) Verfarhen zum Herstellen einer monolithisch integrierten Halbleiteranordnung
DE2911726C2 (de) Verfahren zur Herstellung eines Feldeffekttransistors
DE3301479C2 (de) Verfahren zum Herstellen eines Halbleiterelementes

Legal Events

Date Code Title Description
OHW Rejection