FR2331153A1 - Procede de fabrication d'un dispositif semi-conducteur - Google Patents

Procede de fabrication d'un dispositif semi-conducteur

Info

Publication number
FR2331153A1
FR2331153A1 FR7633828A FR7633828A FR2331153A1 FR 2331153 A1 FR2331153 A1 FR 2331153A1 FR 7633828 A FR7633828 A FR 7633828A FR 7633828 A FR7633828 A FR 7633828A FR 2331153 A1 FR2331153 A1 FR 2331153A1
Authority
FR
France
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7633828A
Other languages
English (en)
French (fr)
Other versions
FR2331153B1 (enExample
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
National Cash Register Co
Original Assignee
NCR Corp
National Cash Register Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp, National Cash Register Co filed Critical NCR Corp
Publication of FR2331153A1 publication Critical patent/FR2331153A1/fr
Application granted granted Critical
Publication of FR2331153B1 publication Critical patent/FR2331153B1/fr
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00Ion implantation into wafers, substrates or parts of devices
    • H10P30/20Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/21Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically active species
    • H10P30/212Through-implantation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/14Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase
    • H10P32/1404Diffusion of dopants within, into or out of semiconductor bodies or layers within a single semiconductor body or layer in a solid phase; between different semiconductor bodies or layers, both in a solid phase using predeposition followed by drive-in of impurities into the semiconductor surface, e.g. predeposition from a gaseous phase
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10PGENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P32/00Diffusion of dopants within, into or out of wafers, substrates or parts of devices
    • H10P32/10Diffusion of dopants within, into or out of semiconductor bodies or layers
    • H10P32/17Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material
    • H10P32/171Diffusion of dopants within, into or out of semiconductor bodies or layers characterised by the semiconductor material being group IV material
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01Manufacture or treatment
    • H10W10/031Manufacture or treatment of isolation regions comprising PN junctions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/30Isolation regions comprising PN junctions
FR7633828A 1975-11-10 1976-11-10 Procede de fabrication d'un dispositif semi-conducteur Granted FR2331153A1 (fr)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/630,490 US4001050A (en) 1975-11-10 1975-11-10 Method of fabricating an isolated p-n junction

Publications (2)

Publication Number Publication Date
FR2331153A1 true FR2331153A1 (fr) 1977-06-03
FR2331153B1 FR2331153B1 (enExample) 1979-03-09

Family

ID=24527389

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7633828A Granted FR2331153A1 (fr) 1975-11-10 1976-11-10 Procede de fabrication d'un dispositif semi-conducteur

Country Status (7)

Country Link
US (1) US4001050A (enExample)
JP (1) JPS5260068A (enExample)
DE (1) DE2650865A1 (enExample)
FR (1) FR2331153A1 (enExample)
GB (1) GB1522269A (enExample)
IT (1) IT1067265B (enExample)
NL (1) NL7612257A (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3044132A1 (de) * 1980-11-24 1982-07-15 Siemens AG, 1000 Berlin und 8000 München Dynamische halbleiter-speicherzelle mit wahlfreiem zugriff und verfahren zu ihrer herstellung
US5250837A (en) * 1991-05-17 1993-10-05 Delco Electronics Corporation Method for dielectrically isolating integrated circuits using doped oxide sidewalls
US5250461A (en) * 1991-05-17 1993-10-05 Delco Electronics Corporation Method for dielectrically isolating integrated circuits using doped oxide sidewalls
US6509237B2 (en) * 2001-05-11 2003-01-21 Hynix Semiconductor America, Inc. Flash memory cell fabrication sequence
US6492710B1 (en) * 2001-06-07 2002-12-10 Cypress Semiconductor Corp. Substrate isolated transistor
US6905955B2 (en) * 2003-02-04 2005-06-14 Micron Technology, Inc. Methods of forming conductive connections, and methods of forming nanofeatures

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3717507A (en) * 1969-06-19 1973-02-20 Shibaura Electric Co Ltd Method of manufacturing semiconductor devices utilizing ion-implantation and arsenic diffusion
NL96608C (enExample) * 1969-10-03
BE759667A (fr) * 1969-12-01 1971-06-01 Philips Nv Procede permettant la fabrication d'un dispositif semiconducteur, et dispositif semiconducteur obtenu par la mise en oeuvre de ce procede
US3756861A (en) * 1972-03-13 1973-09-04 Bell Telephone Labor Inc Bipolar transistors and method of manufacture
US3856578A (en) * 1972-03-13 1974-12-24 Bell Telephone Labor Inc Bipolar transistors and method of manufacture
US3891480A (en) * 1973-10-01 1975-06-24 Honeywell Inc Bipolar semiconductor device construction
US3898105A (en) * 1973-10-25 1975-08-05 Mostek Corp Method for making FET circuits

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
MICROELECTRONICS, VOL. 4, NO. 4, 1973, LONDON GB , R.W.LUTZ ET AL: "NEW DEVELOPMENTS IN CONSUMER INTEGRATED CIRCUITS", PAGES 3-9) *

Also Published As

Publication number Publication date
DE2650865A1 (de) 1977-05-18
JPS6156607B2 (enExample) 1986-12-03
JPS5260068A (en) 1977-05-18
IT1067265B (it) 1985-03-16
NL7612257A (nl) 1977-05-12
US4001050A (en) 1977-01-04
GB1522269A (en) 1978-08-23
FR2331153B1 (enExample) 1979-03-09

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Legal Events

Date Code Title Description
ST Notification of lapse