DE2642206A1 - Verfahren und aufbau einer halbleitervorrichtung mit genau gesteuerter lebensdauer der ladungstraeger - Google Patents

Verfahren und aufbau einer halbleitervorrichtung mit genau gesteuerter lebensdauer der ladungstraeger

Info

Publication number
DE2642206A1
DE2642206A1 DE19762642206 DE2642206A DE2642206A1 DE 2642206 A1 DE2642206 A1 DE 2642206A1 DE 19762642206 DE19762642206 DE 19762642206 DE 2642206 A DE2642206 A DE 2642206A DE 2642206 A1 DE2642206 A1 DE 2642206A1
Authority
DE
Germany
Prior art keywords
zone
ions
transistor
semiconductor
transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19762642206
Other languages
German (de)
English (en)
Inventor
Michael Robert Poponiak
Tsu-Hsing Yeh
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2642206A1 publication Critical patent/DE2642206A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/202—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials
    • H10P30/204—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the semiconductor materials into Group IV semiconductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/50—Physical imperfections
    • H10D62/53—Physical imperfections the imperfections being within the semiconductor body 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/208—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of electrically inactive species
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H10P95/40—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections
    • H10P95/402—Treatments of semiconductor bodies to modify their internal properties, e.g. to produce internal imperfections of silicon bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/02—Manufacture or treatment of conductive package substrates serving as an interconnection, e.g. of metal plates

Landscapes

  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
DE19762642206 1975-12-12 1976-09-20 Verfahren und aufbau einer halbleitervorrichtung mit genau gesteuerter lebensdauer der ladungstraeger Pending DE2642206A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US64013775A 1975-12-12 1975-12-12

Publications (1)

Publication Number Publication Date
DE2642206A1 true DE2642206A1 (de) 1977-06-23

Family

ID=24566992

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19762642206 Pending DE2642206A1 (de) 1975-12-12 1976-09-20 Verfahren und aufbau einer halbleitervorrichtung mit genau gesteuerter lebensdauer der ladungstraeger

Country Status (5)

Country Link
JP (1) JPS5272583A (https=)
DE (1) DE2642206A1 (https=)
FR (1) FR2335045A1 (https=)
GB (1) GB1503249A (https=)
IT (1) IT1123671B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3316680A1 (de) * 1982-05-06 1983-11-10 Mitsubishi Denki K.K., Tokyo Integrierte cmos-schaltung mit erhoehter widerstandsfaehigkeit gegen latch-up-effekt

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0030856B1 (en) * 1979-12-13 1984-03-21 Fujitsu Limited Charge-pumping semiconductor memory cell comprising a charge-storage region and memory device using such a cell
JPS58143563A (ja) * 1982-02-22 1983-08-26 Hitachi Ltd 半導体装置の製造方法
JPS62219636A (ja) * 1986-03-20 1987-09-26 Hitachi Ltd 半導体装置
EP0715770A1 (en) * 1993-09-03 1996-06-12 National Semiconductor Corporation Planar isolation method for use in fabrication of microelectronics
JP2883017B2 (ja) * 1995-02-20 1999-04-19 ローム株式会社 半導体装置およびその製法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3316680A1 (de) * 1982-05-06 1983-11-10 Mitsubishi Denki K.K., Tokyo Integrierte cmos-schaltung mit erhoehter widerstandsfaehigkeit gegen latch-up-effekt

Also Published As

Publication number Publication date
GB1503249A (en) 1978-03-08
FR2335045B1 (https=) 1979-09-21
JPS5272583A (en) 1977-06-17
IT1123671B (it) 1986-04-30
FR2335045A1 (fr) 1977-07-08

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