DE2414033C3 - Verfahren zur Herstellung von Halbleitervorrichtungen mit selektiv auf einer Oberfläche eines Halbleitersubstrats angeordneten Schichten aus einem Oxid des Substratmaterials - Google Patents

Verfahren zur Herstellung von Halbleitervorrichtungen mit selektiv auf einer Oberfläche eines Halbleitersubstrats angeordneten Schichten aus einem Oxid des Substratmaterials

Info

Publication number
DE2414033C3
DE2414033C3 DE2414033A DE2414033A DE2414033C3 DE 2414033 C3 DE2414033 C3 DE 2414033C3 DE 2414033 A DE2414033 A DE 2414033A DE 2414033 A DE2414033 A DE 2414033A DE 2414033 C3 DE2414033 C3 DE 2414033C3
Authority
DE
Germany
Prior art keywords
substrate
areas
layer
semiconductor
oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE2414033A
Other languages
German (de)
English (en)
Other versions
DE2414033B2 (de
DE2414033A1 (de
Inventor
Yoshihiko Hirose
Isao Inoue
Satoru Kawazu
Koichi Kijima
Kousi Nomura
Yoshihiko Watari
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP3319173A external-priority patent/JPS5317390B2/ja
Priority claimed from JP3706473A external-priority patent/JPS5648980B2/ja
Priority claimed from JP5531073A external-priority patent/JPS5652453B2/ja
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE2414033A1 publication Critical patent/DE2414033A1/de
Publication of DE2414033B2 publication Critical patent/DE2414033B2/de
Application granted granted Critical
Publication of DE2414033C3 publication Critical patent/DE2414033C3/de
Expired legal-status Critical Current

Links

Classifications

    • H10P14/6309—
    • H10P14/416—
    • H10P14/61—
    • H10P14/6322—
    • H10P14/6502—
    • H10P30/204—
    • H10P30/208—
    • H10P30/21—
    • H10P76/40—
    • H10P95/00—
    • H10W10/0125—
    • H10W10/13—
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/103—Mask, dual function, e.g. diffusion and oxidation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/106—Masks, special
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/122—Polycrystalline
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/911—Differential oxidation and etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/981—Utilizing varying dielectric thickness

Landscapes

  • Formation Of Insulating Films (AREA)
DE2414033A 1973-03-23 1974-03-22 Verfahren zur Herstellung von Halbleitervorrichtungen mit selektiv auf einer Oberfläche eines Halbleitersubstrats angeordneten Schichten aus einem Oxid des Substratmaterials Expired DE2414033C3 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP3319173A JPS5317390B2 (enExample) 1973-03-23 1973-03-23
JP3706473A JPS5648980B2 (enExample) 1973-03-31 1973-03-31
JP5531073A JPS5652453B2 (enExample) 1973-05-18 1973-05-18

Publications (3)

Publication Number Publication Date
DE2414033A1 DE2414033A1 (de) 1974-10-03
DE2414033B2 DE2414033B2 (de) 1977-06-23
DE2414033C3 true DE2414033C3 (de) 1979-08-09

Family

ID=27287995

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2414033A Expired DE2414033C3 (de) 1973-03-23 1974-03-22 Verfahren zur Herstellung von Halbleitervorrichtungen mit selektiv auf einer Oberfläche eines Halbleitersubstrats angeordneten Schichten aus einem Oxid des Substratmaterials

Country Status (6)

Country Link
US (1) US3966501A (enExample)
DE (1) DE2414033C3 (enExample)
FR (1) FR2222754B1 (enExample)
GB (1) GB1469436A (enExample)
IT (1) IT1007685B (enExample)
NL (1) NL161302C (enExample)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3982262A (en) * 1974-04-17 1976-09-21 Karatsjuba Anatoly Prokofievic Semiconductor indicating instrument
JPS5197385A (en) * 1975-02-21 1976-08-26 Handotaisochino seizohoho
US4002511A (en) * 1975-04-16 1977-01-11 Ibm Corporation Method for forming masks comprising silicon nitride and novel mask structures produced thereby
IT1089298B (it) * 1977-01-17 1985-06-18 Mostek Corp Procedimento per fabbricare un dispositivo semiconduttore
US4179311A (en) * 1977-01-17 1979-12-18 Mostek Corporation Method of stabilizing semiconductor device by converting doped poly-Si to polyoxides
US4098618A (en) * 1977-06-03 1978-07-04 International Business Machines Corporation Method of manufacturing semiconductor devices in which oxide regions are formed by an oxidation mask disposed directly on a substrate damaged by ion implantation
US4157268A (en) * 1977-06-16 1979-06-05 International Business Machines Corporation Localized oxidation enhancement for an integrated injection logic circuit
NL7706802A (nl) * 1977-06-21 1978-12-27 Philips Nv Werkwijze voor het vervaardigen van een half- geleiderinrichting en halfgeleiderinrichting vervaardigd met behulp van de werkwijze.
DE2803431A1 (de) * 1978-01-26 1979-08-02 Siemens Ag Verfahren zur herstellung von mos-transistoren
US4282647A (en) * 1978-04-04 1981-08-11 Standard Microsystems Corporation Method of fabricating high density refractory metal gate MOS integrated circuits utilizing the gate as a selective diffusion and oxidation mask
US4148133A (en) * 1978-05-08 1979-04-10 Sperry Rand Corporation Polysilicon mask for etching thick insulator
JPS559414A (en) * 1978-07-05 1980-01-23 Toshiba Corp Manufacturing method of semiconductor device
JPS5534442A (en) * 1978-08-31 1980-03-11 Fujitsu Ltd Preparation of semiconductor device
US4170500A (en) * 1979-01-15 1979-10-09 Fairchild Camera And Instrument Corporation Process for forming field dielectric regions in semiconductor structures without encroaching on device regions
US4670769A (en) * 1979-04-09 1987-06-02 Harris Corporation Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
US4255207A (en) * 1979-04-09 1981-03-10 Harris Corporation Fabrication of isolated regions for use in self-aligning device process utilizing selective oxidation
AT387474B (de) * 1980-12-23 1989-01-25 Philips Nv Verfahren zur herstellung einer halbleitervorrichtung
NL187328C (nl) * 1980-12-23 1991-08-16 Philips Nv Werkwijze ter vervaardiging van een halfgeleiderinrichting.
US4372033A (en) * 1981-09-08 1983-02-08 Ncr Corporation Method of making coplanar MOS IC structures
US4557036A (en) * 1982-03-31 1985-12-10 Nippon Telegraph & Telephone Public Corp. Semiconductor device and process for manufacturing the same
US4470190A (en) * 1982-11-29 1984-09-11 At&T Bell Laboratories Josephson device fabrication method
EP0126292B1 (en) * 1983-04-21 1987-12-02 Kabushiki Kaisha Toshiba Semiconductor device having an element isolation layer and method of manufacturing the same
US4615746A (en) * 1983-09-29 1986-10-07 Kenji Kawakita Method of forming isolated island regions in a semiconductor substrate by selective etching and oxidation and devices formed therefrom
US5008215A (en) * 1989-07-07 1991-04-16 Industrial Technology Research Institute Process for preparing high sensitivity semiconductive magnetoresistance element
JP2726502B2 (ja) * 1989-08-10 1998-03-11 株式会社東芝 半導体装置の製造方法
US6780718B2 (en) 1993-11-30 2004-08-24 Stmicroelectronics, Inc. Transistor structure and method for making same
TW344897B (en) * 1994-11-30 1998-11-11 At&T Tcorporation A process for forming gate oxides possessing different thicknesses on a semiconductor substrate
US5780347A (en) * 1996-05-20 1998-07-14 Kapoor; Ashok K. Method of forming polysilicon local interconnects
US7060581B2 (en) * 2003-10-09 2006-06-13 Kabushiki Kaisha Toshiba Method for manufacturing a semiconductor device
EP1690290A4 (en) 2003-12-04 2008-10-22 Bae Systems Information Gan-based permeable base transistor and method of fabrication
JP2008147576A (ja) * 2006-12-13 2008-06-26 Sumitomo Electric Ind Ltd 半導体装置の製造方法
CA2792551A1 (en) * 2011-01-17 2012-07-26 Sumitomo Electric Industries, Ltd. Method for manufacturing silicon carbide semiconductor device
TWI588918B (zh) * 2014-04-01 2017-06-21 亞太優勢微系統股份有限公司 具精確間隙機電晶圓結構與及其製作方法

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4915377B1 (enExample) * 1968-10-04 1974-04-15
US3575745A (en) * 1969-04-02 1971-04-20 Bryan H Hill Integrated circuit fabrication
US3748187A (en) * 1971-08-03 1973-07-24 Hughes Aircraft Co Self-registered doped layer for preventing field inversion in mis circuits

Also Published As

Publication number Publication date
FR2222754A1 (enExample) 1974-10-18
GB1469436A (en) 1977-04-06
IT1007685B (it) 1976-10-30
FR2222754B1 (enExample) 1978-01-06
DE2414033B2 (de) 1977-06-23
NL7403940A (enExample) 1974-09-25
DE2414033A1 (de) 1974-10-03
US3966501A (en) 1976-06-29
NL161302C (nl) 1980-01-15
NL161302B (nl) 1979-08-15

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Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
8328 Change in the person/name/address of the agent

Free format text: KERN, R., DIPL.-ING., PAT.-ANW., 8000 MUENCHEN