DE237654T1 - Leseverstaerker fuer einen festwertspeicher. - Google Patents

Leseverstaerker fuer einen festwertspeicher.

Info

Publication number
DE237654T1
DE237654T1 DE198686202064T DE86202064T DE237654T1 DE 237654 T1 DE237654 T1 DE 237654T1 DE 198686202064 T DE198686202064 T DE 198686202064T DE 86202064 T DE86202064 T DE 86202064T DE 237654 T1 DE237654 T1 DE 237654T1
Authority
DE
Germany
Prior art keywords
line
input line
node
potential
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE198686202064T
Other languages
English (en)
Inventor
Donald Gregory Spring Valley Oh 45370 Craycraft
Giao Ngoc Cincinnati Oh 45219 Pham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NCR Voyix Corp
Original Assignee
NCR Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NCR Corp filed Critical NCR Corp
Publication of DE237654T1 publication Critical patent/DE237654T1/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/14—Dummy cell management; Sense reference voltage generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/08—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements
    • G11C17/10—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM
    • G11C17/12—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices
    • G11C17/123—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards using semiconductor devices, e.g. bipolar elements in which contents are determined during manufacturing by a predetermined arrangement of coupling elements, e.g. mask-programmable ROM using field-effect devices comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/06—Sense amplifiers; Associated circuits, e.g. timing or triggering circuits
    • G11C7/062—Differential amplifiers of non-latching type, e.g. comparators, long-tailed pairs
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/18—Bit line organisation; Bit line lay-out

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Dram (AREA)

Claims (3)

  1. Dipl.-lng. Kurt Kahler
    European Patent Attorney
    Postfach 248
    Anmelder: NCR Corporation Gerberstrasse 3
    Dayton, Ohio D-8948 Mindelheim
    USA
    Phone:(0)8261-3027
    Telefax: 8261-6563
    Telex: 53 37 69
    Ihr Zeichen: Unset Zeichen: Datum:
    3403A/EPC 12. Nov. 1987
    Europäische Patentanmeldung: 86202064.1
    Europ. Veröffentlichungsnr.: 0 237 654
    Patentansprüche:
    1. Ein Abtastverstärker mit einer Eingangsleitung (117) und einer Bezugsleitung (93), gekennzeichnet durch: eine erste und zweite Konstantstromerzeugungsvorrichtung (99, 101), die mit entsprechenden ersten und zweiten Bezugsknoten (112, 122) verbunden sind, einem ersten Durchlaß-Feldeffekttransistor (121), der zwischen die Eingangsleitung (117) und den ersten Bezugsknoten (112) geschaltet ist und seine Gateelektrode umgekehrt proportional zum Potential an der Eingangsleitung (117) vorgespannt hat, einen zweiten Durchlaß-Feldeffekttransistor, der zwischen die Bezugsleitung (93) und den zweiten Bezugsknoten (122) geschaltet ist und seine Gateelektrode umgekehrt proportional zum Potential an der Bezugsleitung (93) vorgespannt hat, und eine Detektorvorrichtung (102), die geeignet ist, eine Differenz in der Stromabsinkkapazität zwischen der Eingangsleitung (117) und der Bezugsleitung (93) festzustellen.
  2. 2. Ein Abtastverstärker nach Anspruch 1, dadurch gekennzeichnet, daß die Detektorvorrichtung einen Differenzverstärker (122) aufweist, der auf eine Differenz zwischen den Potentialen des
    ersten und zweiten Bezugsknotens (112, 122) anspricht, wobei das Nennpotential an dem ersten Bezugsknoten (112) um eine konstante Differenz versetzt zum Nennpotential am zweiten Bezugsknoten (122) ist.
  3. 3. Ein Abtastverstärker nach Anspruch 2, dadurch gekennzeichnet, daß die Eingangsleitung (117) geeignet ist, selektiv verbunden zu werden mit einem vorladbaren Knoten (33) eines Nur-Lesen-Speichers und daß die Bezugsleitung geeignet ist, gekoppelt zu werden mit einer Bezugszelle (94), die einen Abschnitt des Nur-Lesen-Speichers wiedergibt.
DE198686202064T 1983-01-10 1984-01-05 Leseverstaerker fuer einen festwertspeicher. Pending DE237654T1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/456,938 US4602354A (en) 1983-01-10 1983-01-10 X-and-OR memory array

Publications (1)

Publication Number Publication Date
DE237654T1 true DE237654T1 (de) 1988-02-25

Family

ID=23814760

Family Applications (3)

Application Number Title Priority Date Filing Date
DE8686202064T Expired - Lifetime DE3483836D1 (de) 1983-01-10 1984-01-05 Leseverstaerker fuer einen festwertspeicher.
DE198686202064T Pending DE237654T1 (de) 1983-01-10 1984-01-05 Leseverstaerker fuer einen festwertspeicher.
DE8484900775T Expired DE3473674D1 (en) 1983-01-10 1984-01-05 Read-only memory system

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE8686202064T Expired - Lifetime DE3483836D1 (de) 1983-01-10 1984-01-05 Leseverstaerker fuer einen festwertspeicher.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8484900775T Expired DE3473674D1 (en) 1983-01-10 1984-01-05 Read-only memory system

Country Status (6)

Country Link
US (1) US4602354A (de)
EP (2) EP0134237B1 (de)
JP (1) JPH0680560B2 (de)
CA (1) CA1202724A (de)
DE (3) DE3483836D1 (de)
WO (1) WO1984002800A2 (de)

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US4933904A (en) * 1985-11-29 1990-06-12 General Electric Company Dense EPROM having serially coupled floating gate transistors
US5877981A (en) * 1987-06-29 1999-03-02 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device having a matrix of memory cells
US5270969A (en) * 1987-06-29 1993-12-14 Kabushiki Kaisha Toshiba Electrically programmable nonvolatile semiconductor memory device with nand cell structure
US6034899A (en) * 1987-06-29 2000-03-07 Kabushiki Kaisha Toshiba Memory cell of nonvolatile semiconductor memory device
US5448517A (en) * 1987-06-29 1995-09-05 Kabushiki Kaisha Toshiba Electrically programmable nonvolatile semiconductor memory device with NAND cell structure
US5008856A (en) * 1987-06-29 1991-04-16 Kabushiki Kaisha Toshiba Electrically programmable nonvolatile semiconductor memory device with NAND cell structure
US6545913B2 (en) 1987-06-29 2003-04-08 Kabushiki Kaisha Toshiba Memory cell of nonvolatile semiconductor memory device
US4931999A (en) * 1987-07-27 1990-06-05 Mitsubishi Denki Kabushiki Kaisha Access circuit for a semiconductor memory
JP2685770B2 (ja) * 1987-12-28 1997-12-03 株式会社東芝 不揮発性半導体記憶装置
USRE35838E (en) * 1987-12-28 1998-07-07 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND cell structure
US4939690A (en) * 1987-12-28 1990-07-03 Kabushiki Kaisha Toshiba Electrically erasable programmable read-only memory with NAND cell structure that suppresses memory cell threshold voltage variation
JP2625991B2 (ja) * 1988-11-17 1997-07-02 三菱電機株式会社 マスクｒｏｍ装置
KR910004166B1 (ko) * 1988-12-27 1991-06-22 삼성전자주식회사 낸드쎌들을 가지는 전기적으로 소거 및 프로그램 가능한 반도체 메모리장치
US4969125A (en) * 1989-06-23 1990-11-06 International Business Machines Corporation Asynchronous segmented precharge architecture
US4992980A (en) * 1989-08-07 1991-02-12 Intel Corporation Novel architecture for virtual ground high-density EPROMS
EP0461904A3 (en) * 1990-06-14 1992-09-09 Creative Integrated Systems, Inc. An improved semiconductor read-only vlsi memory
US5467300A (en) * 1990-06-14 1995-11-14 Creative Integrated Systems, Inc. Grounded memory core for Roms, Eproms, and EEpproms having an address decoder, and sense amplifier
JP3109537B2 (ja) * 1991-07-12 2000-11-20 日本電気株式会社 読み出し専用半導体記憶装置
DE69224125T2 (de) * 1991-09-26 1998-08-27 St Microelectronics Srl Leseverstärker
US5513148A (en) * 1994-12-01 1996-04-30 Micron Technology Inc. Synchronous NAND DRAM architecture
KR0179097B1 (ko) * 1995-04-07 1999-04-15 김주용 데이타 리드/라이트 방법 및 장치
US5825710A (en) * 1997-02-26 1998-10-20 Powerchip Semiconductor Corp. Synchronous semiconductor memory device
US6430099B1 (en) 2001-05-11 2002-08-06 Broadcom Corporation Method and apparatus to conditionally precharge a partitioned read-only memory with shared wordlines for low power operation
US20040001355A1 (en) * 2002-06-27 2004-01-01 Matrix Semiconductor, Inc. Low-cost, serially-connected, multi-level mask-programmable read-only memory
WO2004002453A1 (en) 2002-06-28 2004-01-08 Protiva Biotherapeutics Ltd. Method and apparatus for producing liposomes
US7042750B2 (en) * 2002-07-18 2006-05-09 Samsung Electronics Co., Ltd. Read only memory devices with independently precharged virtual ground and bit lines
KR100429889B1 (ko) * 2002-07-18 2004-05-03 삼성전자주식회사 가상접지선과 비트선을 별개로 프리차지시키는 롬집적회로 장치
US7005350B2 (en) * 2002-12-31 2006-02-28 Matrix Semiconductor, Inc. Method for fabricating programmable memory array structures incorporating series-connected transistor strings
US7505321B2 (en) * 2002-12-31 2009-03-17 Sandisk 3D Llc Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US7233522B2 (en) * 2002-12-31 2007-06-19 Sandisk 3D Llc NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same
US6822903B2 (en) * 2003-03-31 2004-11-23 Matrix Semiconductor, Inc. Apparatus and method for disturb-free programming of passive element memory cells
US7233024B2 (en) * 2003-03-31 2007-06-19 Sandisk 3D Llc Three-dimensional memory device incorporating segmented bit line memory array
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US20050128807A1 (en) * 2003-12-05 2005-06-16 En-Hsing Chen Nand memory array incorporating multiple series selection devices and method for operation of same
US7023739B2 (en) * 2003-12-05 2006-04-04 Matrix Semiconductor, Inc. NAND memory array incorporating multiple write pulse programming of individual memory cells and method for operation of same
US7221588B2 (en) * 2003-12-05 2007-05-22 Sandisk 3D Llc Memory array incorporating memory cells arranged in NAND strings
US7272052B2 (en) * 2005-03-31 2007-09-18 Sandisk 3D Llc Decoding circuit for non-binary groups of memory line drivers
US7359279B2 (en) * 2005-03-31 2008-04-15 Sandisk 3D Llc Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers
US7054219B1 (en) 2005-03-31 2006-05-30 Matrix Semiconductor, Inc. Transistor layout configuration for tight-pitched memory array lines
US7142471B2 (en) * 2005-03-31 2006-11-28 Sandisk 3D Llc Method and apparatus for incorporating block redundancy in a memory array
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Also Published As

Publication number Publication date
WO1984002800A2 (en) 1984-07-19
DE3473674D1 (en) 1988-09-29
EP0237654B1 (de) 1991-01-02
EP0134237B1 (de) 1988-08-24
JPS60500352A (ja) 1985-03-14
CA1202724A (en) 1986-04-01
US4602354A (en) 1986-07-22
WO1984002800A3 (en) 1984-10-11
EP0237654A1 (de) 1987-09-23
DE3483836D1 (de) 1991-02-07
EP0134237A1 (de) 1985-03-20
JPH0680560B2 (ja) 1994-10-12

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