DE2335333B1 - Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik - Google Patents

Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik

Info

Publication number
DE2335333B1
DE2335333B1 DE2335333A DE2335333A DE2335333B1 DE 2335333 B1 DE2335333 B1 DE 2335333B1 DE 2335333 A DE2335333 A DE 2335333A DE 2335333 A DE2335333 A DE 2335333A DE 2335333 B1 DE2335333 B1 DE 2335333B1
Authority
DE
Germany
Prior art keywords
type
layer
areas
field effect
effect transistors
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE2335333A
Other languages
German (de)
English (en)
Inventor
Karl Dr-Ing Goser
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Corp
Original Assignee
Siemens Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Corp filed Critical Siemens Corp
Priority to DE2335333A priority Critical patent/DE2335333B1/de
Priority to GB2412474A priority patent/GB1436975A/en
Priority to FR7423282A priority patent/FR2237317B1/fr
Priority to IT24853/74A priority patent/IT1015709B/it
Priority to LU70489A priority patent/LU70489A1/xx
Priority to US05/487,153 priority patent/US3933529A/en
Priority to JP49079726A priority patent/JPS5039882A/ja
Priority to BE146468A priority patent/BE817544A/xx
Priority to NL7409396A priority patent/NL7409396A/xx
Publication of DE2335333B1 publication Critical patent/DE2335333B1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • H10D86/03Manufacture or treatment wherein the substrate comprises sapphire, e.g. silicon-on-sapphire [SOS]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251Diffusion into or out of group IV semiconductors
    • H01L21/2254Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2255Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/67Thin-film transistors [TFT]
    • H10D30/6704Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device
    • H10D30/6713Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes
    • H10D30/6715Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions
    • H10D30/6717Thin-film transistors [TFT] having supplementary regions or layers in the thin films or in the insulated bulk substrates for controlling properties of the device characterised by the properties of the source or drain regions, e.g. compositions or sectional shapes characterised by the doping profiles, e.g. having lightly-doped source or drain extensions the source and the drain regions being asymmetrical
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/043Dual dielectric
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/053Field effect transistors fets
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/147Silicides
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00Metal treatment
    • Y10S148/151Simultaneous diffusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE2335333A 1973-07-11 1973-07-11 Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik Withdrawn DE2335333B1 (de)

Priority Applications (9)

Application Number Priority Date Filing Date Title
DE2335333A DE2335333B1 (de) 1973-07-11 1973-07-11 Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik
GB2412474A GB1436975A (en) 1973-07-11 1974-05-31 Semiconductor arrangements
FR7423282A FR2237317B1 (enExample) 1973-07-11 1974-07-04
IT24853/74A IT1015709B (it) 1973-07-11 1974-07-05 Procedimento per fabbricare un dispositivo con transistori a ef fetto di campo con la tecnologia mos a canali complementari
LU70489A LU70489A1 (enExample) 1973-07-11 1974-07-09
US05/487,153 US3933529A (en) 1973-07-11 1974-07-10 Process for the production of a pair of complementary field effect transistors
JP49079726A JPS5039882A (enExample) 1973-07-11 1974-07-11
BE146468A BE817544A (fr) 1973-07-11 1974-07-11 Procede pour fabriquer un dispositif comportant des transistors a effet de champ realises suivant la technique a mos complementaires
NL7409396A NL7409396A (nl) 1973-07-11 1974-07-11 Werkwijze voor de vervaardiging van een in- richting met veldeffekttransistors in comple- mentaire mos-techniek.

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE2335333A DE2335333B1 (de) 1973-07-11 1973-07-11 Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik

Publications (1)

Publication Number Publication Date
DE2335333B1 true DE2335333B1 (de) 1975-01-16

Family

ID=5886601

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2335333A Withdrawn DE2335333B1 (de) 1973-07-11 1973-07-11 Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik

Country Status (9)

Country Link
US (1) US3933529A (enExample)
JP (1) JPS5039882A (enExample)
BE (1) BE817544A (enExample)
DE (1) DE2335333B1 (enExample)
FR (1) FR2237317B1 (enExample)
GB (1) GB1436975A (enExample)
IT (1) IT1015709B (enExample)
LU (1) LU70489A1 (enExample)
NL (1) NL7409396A (enExample)

Families Citing this family (30)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5132266U (enExample) * 1974-08-30 1976-03-09
US4002513A (en) * 1975-02-25 1977-01-11 General Electric Company Bucket-brigade delay line having reduced parasitic capacitances and method for making the same
US4045810A (en) * 1975-02-25 1977-08-30 General Electric Company Bucket-brigade delay line having reduced parasitic capacitances
US4027382A (en) * 1975-07-23 1977-06-07 Texas Instruments Incorporated Silicon gate CCD structure
US4035906A (en) * 1975-07-23 1977-07-19 Texas Instruments Incorporated Silicon gate CCD structure
US4050965A (en) * 1975-10-21 1977-09-27 The United States Of America As Represented By The Secretary Of The Air Force Simultaneous fabrication of CMOS transistors and bipolar devices
US4069074A (en) * 1976-01-07 1978-01-17 Styapas Styapono Yanushonis Method of manufacturing semiconductor devices
US4062699A (en) * 1976-02-20 1977-12-13 Western Digital Corporation Method for fabricating diffusion self-aligned short channel MOS device
US4078947A (en) * 1976-08-05 1978-03-14 International Business Machines Corporation Method for forming a narrow channel length MOS field effect transistor
NL7612883A (nl) * 1976-11-19 1978-05-23 Philips Nv Halfgeleiderinrichting, en werkwijze ter ver- vaardiging daarvan.
US4097314A (en) * 1976-12-30 1978-06-27 Rca Corp. Method of making a sapphire gate transistor
US4119992A (en) * 1977-04-28 1978-10-10 Rca Corp. Integrated circuit structure and method for making same
US4145233A (en) * 1978-05-26 1979-03-20 Ncr Corporation Method for making narrow channel FET by masking and ion-implantation
JPS5574172A (en) * 1978-11-27 1980-06-04 Mitsubishi Electric Corp Interpolation type mos transistor
US4252574A (en) * 1979-11-09 1981-02-24 Rca Corporation Low leakage N-channel SOS transistors and method of making them
JPS5683073A (en) * 1979-12-11 1981-07-07 Toshiba Corp Semiconductor device
US4399605A (en) * 1982-02-26 1983-08-23 International Business Machines Corporation Method of making dense complementary transistors
JPS5978557A (ja) * 1982-10-27 1984-05-07 Toshiba Corp 相補型mos半導体装置の製造方法
JPH0745209B2 (ja) * 1986-03-03 1995-05-17 株式会社ブリヂストン 空気入りタイヤの製造方法
JPH0298968A (ja) * 1988-10-06 1990-04-11 Agency Of Ind Science & Technol Mos型半導体装置
US5151374A (en) * 1991-07-24 1992-09-29 Industrial Technology Research Institute Method of forming a thin film field effect transistor having a drain channel junction that is spaced from the gate electrode
US6617644B1 (en) 1998-11-09 2003-09-09 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of manufacturing the same
US7141821B1 (en) * 1998-11-10 2006-11-28 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having an impurity gradient in the impurity regions and method of manufacture
US6518594B1 (en) * 1998-11-16 2003-02-11 Semiconductor Energy Laboratory Co., Ltd. Semiconductor devices
US6909114B1 (en) 1998-11-17 2005-06-21 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device having LDD regions
US6501098B2 (en) * 1998-11-25 2002-12-31 Semiconductor Energy Laboratory Co, Ltd. Semiconductor device
US6365917B1 (en) * 1998-11-25 2002-04-02 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US6277679B1 (en) 1998-11-25 2001-08-21 Semiconductor Energy Laboratory Co., Ltd. Method of manufacturing thin film transistor
US6469317B1 (en) 1998-12-18 2002-10-22 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device and method of fabricating the same
EP3488471B1 (en) * 2016-07-25 2024-09-11 BOE Technology Group Co., Ltd. Method of fabricating polycrystalline silicon thin film transistor

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3436817A (en) * 1967-02-13 1969-04-08 Us Air Force Method of making fringing field controlled thin film active device
NL6813833A (enExample) * 1968-09-27 1970-04-01
US3745072A (en) * 1970-04-07 1973-07-10 Rca Corp Semiconductor device fabrication
US3749614A (en) * 1970-09-14 1973-07-31 Rca Corp Fabrication of semiconductor devices
US3728591A (en) * 1971-09-03 1973-04-17 Rca Corp Gate protective device for insulated gate field-effect transistors
US3739273A (en) * 1971-11-02 1973-06-12 Us Army Spectrum analyzer
US3846194A (en) * 1973-01-05 1974-11-05 Inselek Inc Process for producing lightly doped p and n-type regions of silicon on an insulating substrate

Also Published As

Publication number Publication date
IT1015709B (it) 1977-05-20
LU70489A1 (enExample) 1974-11-28
FR2237317B1 (enExample) 1978-11-24
FR2237317A1 (enExample) 1975-02-07
NL7409396A (nl) 1975-01-14
GB1436975A (en) 1976-05-26
BE817544A (fr) 1974-11-04
JPS5039882A (enExample) 1975-04-12
US3933529A (en) 1976-01-20

Similar Documents

Publication Publication Date Title
DE2335333B1 (de) Verfahren zur Herstellung von einer Anordnung mit Feldeffekttransistoren in Komplementaer-MOS-Technik
DE69615458T2 (de) Dünnfilmtransistor über einem isolierten Halbleitersubstrat und Verfahren zur Herstellung
DE69332619T2 (de) Verfahren zur Herstellung von einem Feldeffektbauelement mit einem isolierten Gatter
DE2706623C2 (enExample)
DE69015666T2 (de) MOSFET-Transistor mit nicht-gleichmässiger Schwellspannung im Kanalbereich.
DE2816795C2 (enExample)
DE68928326T2 (de) Eingeschlossener transistor mit eingegrabenem kanal
DE102018116869A1 (de) Halbleitervorrichtung und Herstellungsverfahren dafür
DE1944793C3 (de) Verfahren zur Herstellung einer integrierten Halbleiteranordnung
DE3023616A1 (de) Halbleitervorrichtung und verfahren zu ihrer herstellung
DE2903534A1 (de) Feldeffekttransistor
DE60028847T2 (de) Verfahren mit reduzierter Maskenzahl für die Herstellung von Mischsspannung-CMOS mit Hochleistung-Transistoren und -I/O Transistoren von hoher Zuverlässigkeit
DE4208537A1 (de) Mos-fet-struktur
DE2133184A1 (de) Verfahren zum Herstellen von Halbleiterbauteilen
DE19735425B4 (de) Mosfet
DE2607203B2 (de) Feldeffekttransistor vom Anreicherungstyp
DE2503864A1 (de) Halbleiterbauelement
DE2453279C3 (de) Halbleiteranordnung
DE3650638T2 (de) Integrierte Halbleiterschaltung mit Isolationszone
DE69614326T2 (de) Mosfet mit niedrigem leckstrom
DE2834724A1 (de) Mos-feldeffekttransistoren fuer hoehere spannungen
DE69226569T2 (de) Selbstjustierender Polysilizium-T-Gatekontakt
DE112015003603T5 (de) Split-Gate-Halbleitervorrichtung mit L-förmigem Gate
EP1003218A1 (de) Halbleiteranordnungen mit einer Schottky-Diode und einer Diode mit einem hochdotierten Bereich und entsprechende Herstellungsverfahren
DE3932445C2 (de) Komplementäre Halbleitereinrichtung mit einem verbesserten Isolationsbereich

Legal Events

Date Code Title Description
BHJ Nonpayment of the annual fee