DE69614326T2 - Mosfet mit niedrigem leckstrom - Google Patents

Mosfet mit niedrigem leckstrom

Info

Publication number
DE69614326T2
DE69614326T2 DE69614326T DE69614326T DE69614326T2 DE 69614326 T2 DE69614326 T2 DE 69614326T2 DE 69614326 T DE69614326 T DE 69614326T DE 69614326 T DE69614326 T DE 69614326T DE 69614326 T2 DE69614326 T2 DE 69614326T2
Authority
DE
Germany
Prior art keywords
leak current
low leak
current mosfet
mosfet
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69614326T
Other languages
English (en)
Other versions
DE69614326D1 (de
Inventor
M Luich
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
National Semiconductor Corp
Original Assignee
National Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by National Semiconductor Corp filed Critical National Semiconductor Corp
Application granted granted Critical
Publication of DE69614326D1 publication Critical patent/DE69614326D1/de
Publication of DE69614326T2 publication Critical patent/DE69614326T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • H01L21/8234MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/8238Complementary field-effect transistors, e.g. CMOS
    • H01L21/823814Complementary field-effect transistors, e.g. CMOS with a particular manufacturing method of the source or drain structures, e.g. specific source or drain implants or silicided source or drain structures or raised source or drain structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8248Combination of bipolar and field-effect technology
    • H01L21/8249Bipolar and MOS technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45Ohmic electrodes
    • H01L29/456Ohmic electrodes on silicon

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Semiconductor Memories (AREA)
DE69614326T 1995-02-16 1996-02-14 Mosfet mit niedrigem leckstrom Expired - Lifetime DE69614326T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US38972095A 1995-02-16 1995-02-16
PCT/US1996/002143 WO1996025762A1 (en) 1995-02-16 1996-02-14 Mosfet with reduced leakage current

Publications (2)

Publication Number Publication Date
DE69614326D1 DE69614326D1 (de) 2001-09-13
DE69614326T2 true DE69614326T2 (de) 2002-06-06

Family

ID=23539447

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69614326T Expired - Lifetime DE69614326T2 (de) 1995-02-16 1996-02-14 Mosfet mit niedrigem leckstrom

Country Status (5)

Country Link
US (2) US5824577A (de)
EP (1) EP0756758B1 (de)
KR (1) KR100304139B1 (de)
DE (1) DE69614326T2 (de)
WO (1) WO1996025762A1 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5840624A (en) * 1996-03-15 1998-11-24 Taiwan Semiconductor Manufacturing Company, Ltd Reduction of via over etching for borderless contacts
US6140166A (en) * 1996-12-27 2000-10-31 Semicondutor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor and method for manufacturing semiconductor device
US5851883A (en) * 1997-04-23 1998-12-22 Advanced Micro Devices, Inc. High density integrated circuit process
US6376348B1 (en) * 1997-09-30 2002-04-23 Siemens Aktiengesellschaft Reliable polycide gate stack with reduced sheet resistance and thickness
US6001721A (en) * 1998-02-19 1999-12-14 Taiwan Semiconductor Manufacturing Company, Ltd. Silicide and salicide on the same chip
KR100317532B1 (ko) * 1999-04-22 2001-12-22 윤종용 반도체 소자 및 그 제조방법
TW432505B (en) * 1999-05-03 2001-05-01 United Microelectronics Corp Manufacturing method of gate
US7049855B2 (en) * 2001-06-28 2006-05-23 Intel Corporation Area efficient waveform evaluation and DC offset cancellation circuits
JP3719189B2 (ja) * 2001-10-18 2005-11-24 セイコーエプソン株式会社 半導体装置の製造方法
US8274110B2 (en) 2009-05-20 2012-09-25 Micron Technology, Inc. Vertically-oriented semiconductor selection device providing high drive current in cross-point array memory
US8421164B2 (en) 2010-01-05 2013-04-16 Micron Technology, Inc. Memory cell array with semiconductor selection device for multiple memory cells
US8969154B2 (en) 2011-08-23 2015-03-03 Micron Technology, Inc. Methods for fabricating semiconductor device structures and arrays of vertical transistor devices
CN105679758B (zh) * 2016-03-25 2017-12-29 南京微盟电子有限公司 一种具有防电流倒灌的p型金属氧化物半导体场效应管

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4714685A (en) * 1986-12-08 1987-12-22 General Motors Corporation Method of fabricating self-aligned silicon-on-insulator like devices
US4849344A (en) * 1986-12-11 1989-07-18 Fairchild Semiconductor Corporation Enhanced density modified isoplanar process
US4734382A (en) * 1987-02-20 1988-03-29 Fairchild Semiconductor Corporation BiCMOS process having narrow bipolar emitter and implanted aluminum isolation
JPH01298765A (ja) * 1988-05-27 1989-12-01 Fujitsu Ltd 半導体装置及びその製造方法
DE68928460T2 (de) * 1988-09-06 1998-04-02 Canon K.K., Tokio/Tokyo Maskenkassetten-Ladevorrichtung
JPH0391245A (ja) * 1989-09-01 1991-04-16 Sumitomo Metal Ind Ltd 薄膜半導体装置とその製造方法
FR2652448B1 (fr) * 1989-09-28 1994-04-29 Commissariat Energie Atomique Procede de fabrication d'un circuit integre mis haute tension.
EP0422824A1 (de) * 1989-10-12 1991-04-17 AT&T Corp. Feldeffekttransistor mit Fenster aus Polysilizium
US5107321A (en) * 1990-04-02 1992-04-21 National Semiconductor Corporation Interconnect method for semiconductor devices
US5234847A (en) * 1990-04-02 1993-08-10 National Semiconductor Corporation Method of fabricating a BiCMOS device having closely spaced contacts
KR100234550B1 (ko) * 1990-04-02 1999-12-15 클라크 3세 존 엠 증가된 항복 전압을 지닌 트랜지스터 디바이스 및 제조방법
US5231042A (en) * 1990-04-02 1993-07-27 National Semiconductor Corporation Formation of silicide contacts using a sidewall oxide process
EP0452720A3 (en) * 1990-04-02 1994-10-26 Nat Semiconductor Corp A semiconductor structure and method of its manufacture
US5219784A (en) * 1990-04-02 1993-06-15 National Semiconductor Corporation Spacer formation in a bicmos device
US5124775A (en) * 1990-07-23 1992-06-23 National Semiconductor Corporation Semiconductor device with oxide sidewall
US5168072A (en) * 1990-10-12 1992-12-01 Texas Instruments Incorporated Method of fabricating an high-performance insulated-gate field-effect transistor
ATE139058T1 (de) * 1990-10-23 1996-06-15 Siemens Ag Verfahren zur herstellung einer dotierten polyzidschicht auf einem halbleitersubstrat

Also Published As

Publication number Publication date
KR100304139B1 (ko) 2001-10-19
US5824577A (en) 1998-10-20
WO1996025762A1 (en) 1996-08-22
EP0756758B1 (de) 2001-08-08
KR970702577A (ko) 1997-05-13
DE69614326D1 (de) 2001-09-13
US5801424A (en) 1998-09-01
EP0756758A1 (de) 1997-02-05

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