DE2254821A1 - Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung - Google Patents

Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung

Info

Publication number
DE2254821A1
DE2254821A1 DE2254821A DE2254821A DE2254821A1 DE 2254821 A1 DE2254821 A1 DE 2254821A1 DE 2254821 A DE2254821 A DE 2254821A DE 2254821 A DE2254821 A DE 2254821A DE 2254821 A1 DE2254821 A1 DE 2254821A1
Authority
DE
Germany
Prior art keywords
layer
insulating layer
oxide
zone
field effect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE2254821A
Other languages
German (de)
English (en)
Inventor
Joseph Gijsbertus Van Lierop
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
Original Assignee
Philips Gloeilampenfabrieken NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Gloeilampenfabrieken NV filed Critical Philips Gloeilampenfabrieken NV
Publication of DE2254821A1 publication Critical patent/DE2254821A1/de
Ceased legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/891Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID
    • H10D84/895Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of only components covered by H10D44/00, e.g. integration of charge-coupled devices [CCD] or charge injection devices [CID comprising bucket-brigade charge-coupled devices
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current 
    • G05F1/12Regulating voltage or current  wherein the variable actually regulated by the final control device is AC
    • G05F1/24Regulating voltage or current  wherein the variable actually regulated by the final control device is AC using bucking or boosting transformers as final control devices
    • G05F1/247Regulating voltage or current  wherein the variable actually regulated by the final control device is AC using bucking or boosting transformers as final control devices with motor in control circuit
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/027Manufacture or treatment of FETs having insulated gates [IGFET] of lateral single-gate IGFETs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00Subject matter not provided for in other groups of this subclass
    • H10P76/40
    • H10W10/0125
    • H10W10/13
    • H10D64/01336

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Electromagnetism (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Formation Of Insulating Films (AREA)
DE2254821A 1971-11-25 1972-11-09 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung Ceased DE2254821A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
NL7116182A NL7116182A (enExample) 1971-11-25 1971-11-25

Publications (1)

Publication Number Publication Date
DE2254821A1 true DE2254821A1 (de) 1973-05-30

Family

ID=19814543

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2254821A Ceased DE2254821A1 (de) 1971-11-25 1972-11-09 Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung

Country Status (11)

Country Link
JP (1) JPS4861078A (enExample)
AR (1) AR194520A1 (enExample)
AT (1) ATA994272A (enExample)
AU (1) AU469642B2 (enExample)
CA (1) CA970077A (enExample)
DE (1) DE2254821A1 (enExample)
ES (1) ES408908A1 (enExample)
FR (1) FR2161003B1 (enExample)
GB (1) GB1409095A (enExample)
IT (1) IT975824B (enExample)
NL (1) NL7116182A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0008691A1 (de) * 1978-08-31 1980-03-19 International Business Machines Corporation Speicherzelle für eine Eimerkettenschaltung

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4142199A (en) * 1977-06-24 1979-02-27 International Business Machines Corporation Bucket brigade device and process

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0008691A1 (de) * 1978-08-31 1980-03-19 International Business Machines Corporation Speicherzelle für eine Eimerkettenschaltung

Also Published As

Publication number Publication date
AR194520A1 (es) 1973-07-23
CA970077A (en) 1975-06-24
AU469642B2 (en) 1976-02-19
AU4908072A (en) 1974-05-23
NL7116182A (enExample) 1973-05-29
GB1409095A (en) 1975-10-08
FR2161003B1 (enExample) 1978-02-03
JPS4861078A (enExample) 1973-08-27
IT975824B (it) 1974-08-10
ES408908A1 (es) 1975-10-16
FR2161003A1 (enExample) 1973-07-06
ATA994272A (de) 1975-08-15

Similar Documents

Publication Publication Date Title
DE2745857C2 (enExample)
DE2640525C2 (de) Verfahren zur Herstellung einer MIS-Halbleiterschaltungsanordnung
DE2212049C2 (de) Verfahren zur Herstellung einer Halbleiteranordnung und Verfahren zur Herstellung eines Transistors
DE2352762C2 (de) Verfahren zur Herstellung einer monolithischen Halbleiterschaltungsanordnung mit komplementären Feldeffekt-Transistoren
EP0239652B1 (de) Verfahren zum Herstellen einer monolithisch integrierten Schaltung mit mindestens einem bipolaren Planartransistor
DE4028488C2 (de) Verfahren zur Herstellung einer Halbleiterspeichervorrichtung
DE2916364C2 (enExample)
DE2646308A1 (de) Verfahren zur herstellung elektronischer anordnungen
DE2253702A1 (de) Verfahren zur herstellung einer halbleiteranordnung und durch dieses verfahren hergestellte halbleiteranordnung
DE3334337A1 (de) Verfahren zur herstellung einer integrierten halbleitereinrichtung
DE2705503C3 (de) Halbleiterspeicheranordnung
DE3011982A1 (de) Halbleitervorrichtung mit mehreren feldeffekttransistoren
DE2754229A1 (de) Leistungsbauelement vom mosfet-typ und zugehoeriges herstellungsverfahren
DE2509315A1 (de) Feldeffekt-halbleiterbauelement und verfahren zu dessen herstellung
DE4234528A1 (de) Halbleitervorrichtung und verfahren zu deren herstellung
DE2953111A1 (en) Dynamic random access memory
DE2922015A1 (de) Verfahren zur herstellung einer vlsi-schaltung
DE2453279C3 (de) Halbleiteranordnung
DE3779802T2 (de) Verfahren zur herstellung einer halbleiteranordnung.
DE2160462A1 (de) Halbleiteranordnung und verfahren zur herstellung dieser halbleiteranordnung.
DE3424181A1 (de) Cmos verfahren zur herstellung integrierter schaltungen, insbesondere dynamischer speicherzellen
DE69226569T2 (de) Selbstjustierender Polysilizium-T-Gatekontakt
DE3046524A1 (de) "halbleitervorrichtung und verfahren zu ihrer herstellung"
DE4447149A1 (de) Vollständig eingeebneter konkaver Transistor
DE2111633A1 (de) Verfahren zur Herstellung eines Oberflaechen-Feldeffekt-Transistors

Legal Events

Date Code Title Description
8131 Rejection