DE2234906A1 - Binaeraddierer - Google Patents

Binaeraddierer

Info

Publication number
DE2234906A1
DE2234906A1 DE2234906A DE2234906A DE2234906A1 DE 2234906 A1 DE2234906 A1 DE 2234906A1 DE 2234906 A DE2234906 A DE 2234906A DE 2234906 A DE2234906 A DE 2234906A DE 2234906 A1 DE2234906 A1 DE 2234906A1
Authority
DE
Germany
Prior art keywords
devices
level
output
transistor
input
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE2234906A
Other languages
German (de)
English (en)
Inventor
Jun J Beverly Young
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull HN Information Systems Italia SpA
Original Assignee
Honeywell Information Systems Italia SpA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell Information Systems Italia SpA filed Critical Honeywell Information Systems Italia SpA
Publication of DE2234906A1 publication Critical patent/DE2234906A1/de
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/38—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation
    • G06F7/48—Methods or arrangements for performing computations using exclusively denominational number representation, e.g. using binary, ternary, decimal representation using non-contact-making devices, e.g. tube, solid state device; using unspecified devices
    • G06F7/50—Adding; Subtracting
    • G06F7/501—Half or full adders, i.e. basic adder cells for one denomination
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2207/00—Indexing scheme relating to methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F2207/38—Indexing scheme relating to groups G06F7/38 - G06F7/575
    • G06F2207/48—Indexing scheme relating to groups G06F7/48 - G06F7/575
    • G06F2207/4802—Special implementations
    • G06F2207/4814—Non-logic devices, e.g. operational amplifiers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Pure & Applied Mathematics (AREA)
  • Mathematical Analysis (AREA)
  • Computational Mathematics (AREA)
  • Computing Systems (AREA)
  • Mathematical Optimization (AREA)
  • General Engineering & Computer Science (AREA)
  • Manipulation Of Pulses (AREA)
  • Logic Circuits (AREA)
  • Analogue/Digital Conversion (AREA)
DE2234906A 1971-07-16 1972-07-15 Binaeraddierer Pending DE2234906A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US16322571A 1971-07-16 1971-07-16

Publications (1)

Publication Number Publication Date
DE2234906A1 true DE2234906A1 (de) 1973-01-25

Family

ID=22589015

Family Applications (1)

Application Number Title Priority Date Filing Date
DE2234906A Pending DE2234906A1 (de) 1971-07-16 1972-07-15 Binaeraddierer

Country Status (7)

Country Link
US (1) US3728531A (enExample)
JP (1) JPS5524135B1 (enExample)
AU (1) AU459591B2 (enExample)
CA (1) CA969281A (enExample)
DE (1) DE2234906A1 (enExample)
FR (1) FR2146721A5 (enExample)
GB (1) GB1393710A (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0628503A (ja) * 1992-05-15 1994-02-04 Takayama:Kk 加算器
US10514911B2 (en) * 2014-11-26 2019-12-24 International Business Machines Corporation Structure for microprocessor including arithmetic logic units and an efficiency logic unit

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL149331B (nl) * 1948-10-13 Matsushita Electric Industrial Co Ltd Werkwijze voor het vervaardigen van een brandstofcelelektrode, alsmede aldus verkregen brandstofcelelektrode.
US3586845A (en) * 1966-09-13 1971-06-22 Agency Ind Science Techn Binary full adder utilizing operational amplifiers
US3534404A (en) * 1967-06-29 1970-10-13 Sperry Rand Corp Carry and comparator networks for multi-input majority logic elements
US3609329A (en) * 1969-05-05 1971-09-28 Shell Oil Co Threshold logic for integrated full adder and the like

Also Published As

Publication number Publication date
AU459591B2 (en) 1975-03-27
CA969281A (en) 1975-06-10
FR2146721A5 (enExample) 1973-03-02
AU4220472A (en) 1973-11-15
JPS5524135B1 (enExample) 1980-06-27
US3728531A (en) 1973-04-17
GB1393710A (en) 1975-05-14

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