DE2013949A1 - Verfahren zur Herstellung von Planartransistoren - Google Patents

Verfahren zur Herstellung von Planartransistoren

Info

Publication number
DE2013949A1
DE2013949A1 DE19702013949 DE2013949A DE2013949A1 DE 2013949 A1 DE2013949 A1 DE 2013949A1 DE 19702013949 DE19702013949 DE 19702013949 DE 2013949 A DE2013949 A DE 2013949A DE 2013949 A1 DE2013949 A1 DE 2013949A1
Authority
DE
Germany
Prior art keywords
diffusion
gold
dopant
zone
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19702013949
Other languages
German (de)
English (en)
Inventor
Madhukar Laxman Waiden Woods; Viva Osvaldo Raul Williston; Vt.; Masters Burton Joseph; Yeh Tsu-Hsing; Poughkeepsie N.Y.; Joshi (V.St.A.)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE2013949A1 publication Critical patent/DE2013949A1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/834—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge further characterised by the dopants
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0112—Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S118/00—Coating apparatus
    • Y10S118/90—Semiconductor vapor doping
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/037—Diffusion-deposition
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/062—Gold diffusion
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/085—Isolated-integrated
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/151—Simultaneous diffusion

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
DE19702013949 1969-05-09 1970-03-24 Verfahren zur Herstellung von Planartransistoren Pending DE2013949A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US82325569A 1969-05-09 1969-05-09

Publications (1)

Publication Number Publication Date
DE2013949A1 true DE2013949A1 (de) 1970-11-19

Family

ID=25238228

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19702013949 Pending DE2013949A1 (de) 1969-05-09 1970-03-24 Verfahren zur Herstellung von Planartransistoren

Country Status (4)

Country Link
US (1) US3625781A (enExample)
JP (1) JPS5110070B1 (enExample)
DE (1) DE2013949A1 (enExample)
FR (1) FR2042505B1 (enExample)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4066484A (en) * 1974-10-24 1978-01-03 General Electric Company Method of manufacture of a gold diffused thyristor
DE2625856C3 (de) * 1976-06-09 1980-04-17 Siemens Ag, 1000 Berlin Und 8000 Muenchen Halbleiterbauelement
DE2710701C3 (de) * 1977-03-11 1980-08-28 Siemens Ag, 1000 Berlin Und 8000 Muenchen Halbleiterbauelement
US4140560A (en) * 1977-06-20 1979-02-20 International Rectifier Corporation Process for manufacture of fast recovery diodes
JPS55102266A (en) * 1979-01-31 1980-08-05 Fujitsu Ltd Fabricating method of semiconductor device
US4291329A (en) * 1979-08-31 1981-09-22 Westinghouse Electric Corp. Thyristor with continuous recombination center shunt across planar emitter-base junction
JPS5821342A (ja) * 1981-07-31 1983-02-08 Hitachi Ltd 半導体装置
US4620211A (en) * 1984-08-13 1986-10-28 General Electric Company Method of reducing the current gain of an inherent bipolar transistor in an insulated-gate semiconductor device and resulting devices
CH668860A5 (de) * 1986-02-05 1989-01-31 Bbc Brown Boveri & Cie Halbleiterbauelement und verfahren zu dessen herstellung.
IT1245365B (it) * 1991-03-28 1994-09-20 Cons Ric Microelettronica Struttura integrata di dispositivo bipolare di potenza ad elevata densita' di corrente e diodo veloce e relativo processo di fabbricazione
DE102007020039B4 (de) * 2007-04-27 2011-07-14 Infineon Technologies Austria Ag Verfahren zur Herstellung einer vertikal inhomogenen Platin- oder Goldverteilung in einem Halbleitersubstrat und in einem Halbleiterbauelement, derart hergestelltes Halbleitersubstrat und Halbleiterbauelement

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1080627A (en) * 1963-11-26 1967-08-23 Ibm Electroluminescent device
US3422322A (en) * 1965-08-25 1969-01-14 Texas Instruments Inc Drift transistor
DE1544271A1 (de) * 1965-11-11 1969-02-27 Siemens Ag Verfahren zum Einbringen von Mangan in zum Herstellen elektronischer Halbleiterelemente dienende Halbleiterkoerper
US3473976A (en) * 1966-03-31 1969-10-21 Ibm Carrier lifetime killer doping process for semiconductor structures and the product formed thereby
FR1537360A (fr) * 1966-09-19 1968-08-23 Westinghouse Electric Corp Procédé pour faire diffuser l'or dans un matériau semi-conducteur
US3440113A (en) * 1966-09-19 1969-04-22 Westinghouse Electric Corp Process for diffusing gold into semiconductor material

Also Published As

Publication number Publication date
JPS5110070B1 (enExample) 1976-04-01
FR2042505A1 (enExample) 1971-02-12
FR2042505B1 (enExample) 1974-11-15
US3625781A (en) 1971-12-07

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