DE19983726B4 - Schaltung für einen datenabhängigen Vorspannungspegel - Google Patents

Schaltung für einen datenabhängigen Vorspannungspegel Download PDF

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Publication number
DE19983726B4
DE19983726B4 DE19983726T DE19983726T DE19983726B4 DE 19983726 B4 DE19983726 B4 DE 19983726B4 DE 19983726 T DE19983726 T DE 19983726T DE 19983726 T DE19983726 T DE 19983726T DE 19983726 B4 DE19983726 B4 DE 19983726B4
Authority
DE
Germany
Prior art keywords
voltage
internal node
signal
bias voltage
circuit arrangement
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19983726T
Other languages
German (de)
English (en)
Other versions
DE19983726T1 (de
Inventor
Luke A. Tempe JOHNSON
John K. Mesa Schwartzlow
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Intel Corp
Original Assignee
Intel Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE19983726T1 publication Critical patent/DE19983726T1/de
Application granted granted Critical
Publication of DE19983726B4 publication Critical patent/DE19983726B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/66—Digital/analogue converters
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
    • H03M1/129—Means for adapting the input signal to the range the converter can handle, e.g. limiting, pre-scaling ; Out-of-range indication
    • H03M1/1295—Clamping, i.e. adjusting the DC level of the input signal to a predetermined value

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Dc Digital Transmission (AREA)
DE19983726T 1998-11-12 1999-11-05 Schaltung für einen datenabhängigen Vorspannungspegel Expired - Fee Related DE19983726B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/191,075 1998-11-12
US09/191,075 US6075476A (en) 1998-11-12 1998-11-12 Method and circuit for data dependent voltage bias level
PCT/US1999/026257 WO2000030261A1 (en) 1998-11-12 1999-11-05 Circuit for data dependent voltage bias level

Publications (2)

Publication Number Publication Date
DE19983726T1 DE19983726T1 (de) 2001-10-04
DE19983726B4 true DE19983726B4 (de) 2011-04-14

Family

ID=22704038

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19983726T Expired - Fee Related DE19983726B4 (de) 1998-11-12 1999-11-05 Schaltung für einen datenabhängigen Vorspannungspegel

Country Status (7)

Country Link
US (2) US6075476A (https=)
JP (1) JP4348015B2 (https=)
KR (1) KR100569749B1 (https=)
CN (1) CN1160865C (https=)
AU (1) AU1471000A (https=)
DE (1) DE19983726B4 (https=)
WO (1) WO2000030261A1 (https=)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6075476A (en) * 1998-11-12 2000-06-13 Intel Corporation Method and circuit for data dependent voltage bias level
JP2002107424A (ja) * 2000-10-02 2002-04-10 Hitachi Ltd 半導体集積回路
US6518893B1 (en) 2001-08-24 2003-02-11 Xilinx, Inc. Method and apparatus for multilevel signal operation
KR101119107B1 (ko) * 2005-12-08 2012-03-16 엘지전자 주식회사 이동통신용 단말
US7233274B1 (en) * 2005-12-20 2007-06-19 Impinj, Inc. Capacitive level shifting for analog signal processing
US7656226B2 (en) * 2006-03-31 2010-02-02 Intel Corporation Switched capacitor equalizer with offset voltage cancelling
US7649388B2 (en) * 2006-03-31 2010-01-19 Intel Corporation Analog voltage recovery circuit
US9207116B2 (en) 2013-02-12 2015-12-08 Gentex Corporation Light sensor
US8717070B1 (en) * 2013-03-12 2014-05-06 Cypress Semiconductor Corporation Multifunctional configurable analog circuit block, methods, and integrated circuit devices having the same
CN105247827B (zh) 2013-06-27 2019-06-25 英特尔公司 低功率均衡器及其训练
KR102349415B1 (ko) * 2017-08-07 2022-01-11 삼성전자주식회사 펄스 진폭 변조 송신기 및 펄스 진폭 변조 수신기
CN115278402B (zh) * 2022-07-27 2023-09-01 南京慧尔视智能科技有限公司 一种信息采集设备及方法

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5371552A (en) * 1991-10-31 1994-12-06 North American Philips Corporation Clamping circuit with offset compensation for analog-to-digital converters
DE68925169T2 (de) * 1988-09-21 1996-07-04 Ibm Analog-Digitalwandler

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3353260B2 (ja) * 1994-09-30 2002-12-03 シャープ株式会社 インターフェイス回路
US6075476A (en) * 1998-11-12 2000-06-13 Intel Corporation Method and circuit for data dependent voltage bias level

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE68925169T2 (de) * 1988-09-21 1996-07-04 Ibm Analog-Digitalwandler
US5371552A (en) * 1991-10-31 1994-12-06 North American Philips Corporation Clamping circuit with offset compensation for analog-to-digital converters

Also Published As

Publication number Publication date
KR100569749B1 (ko) 2006-04-11
CN1333949A (zh) 2002-01-30
CN1160865C (zh) 2004-08-04
JP2002530921A (ja) 2002-09-17
JP4348015B2 (ja) 2009-10-21
US6342848B1 (en) 2002-01-29
KR20010080431A (ko) 2001-08-22
DE19983726T1 (de) 2001-10-04
US6075476A (en) 2000-06-13
AU1471000A (en) 2000-06-05
WO2000030261A1 (en) 2000-05-25

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OP8 Request for examination as to paragraph 44 patent law
8607 Notification of search results after publication
R020 Patent grant now final
R020 Patent grant now final

Effective date: 20110830

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20130601