DE19721516C2 - Mikroprozessor - Google Patents

Mikroprozessor

Info

Publication number
DE19721516C2
DE19721516C2 DE19721516A DE19721516A DE19721516C2 DE 19721516 C2 DE19721516 C2 DE 19721516C2 DE 19721516 A DE19721516 A DE 19721516A DE 19721516 A DE19721516 A DE 19721516A DE 19721516 C2 DE19721516 C2 DE 19721516C2
Authority
DE
Germany
Prior art keywords
memory cell
signal
cell arrangement
memory
microprocessor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19721516A
Other languages
German (de)
English (en)
Other versions
DE19721516A1 (de
Inventor
Takashi Higuchi
Naoto Okumura
Hideo Tsubota
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE19721516A1 publication Critical patent/DE19721516A1/de
Application granted granted Critical
Publication of DE19721516C2 publication Critical patent/DE19721516C2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G06F11/2205—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested
    • G06F11/2236—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing using arrangements specific to the hardware being tested to test CPU or processors

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Debugging And Monitoring (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
DE19721516A 1996-10-29 1997-05-22 Mikroprozessor Expired - Fee Related DE19721516C2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8286604A JPH10133908A (ja) 1996-10-29 1996-10-29 マイクロプロセッサ

Publications (2)

Publication Number Publication Date
DE19721516A1 DE19721516A1 (de) 1998-05-07
DE19721516C2 true DE19721516C2 (de) 1999-07-15

Family

ID=17706572

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19721516A Expired - Fee Related DE19721516C2 (de) 1996-10-29 1997-05-22 Mikroprozessor

Country Status (6)

Country Link
US (1) US5983367A (cg-RX-API-DMAC7.html)
JP (1) JPH10133908A (cg-RX-API-DMAC7.html)
KR (1) KR19980032077A (cg-RX-API-DMAC7.html)
CN (1) CN1132111C (cg-RX-API-DMAC7.html)
DE (1) DE19721516C2 (cg-RX-API-DMAC7.html)
TW (1) TW332341B (cg-RX-API-DMAC7.html)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3219148B2 (ja) * 1998-11-26 2001-10-15 日本電気株式会社 データメモリ装置
DE19903302B4 (de) * 1999-01-28 2015-05-21 Robert Bosch Gmbh Verfahren und Vorrichtung zur Überprüfung der Funktion eines Rechners
DE50214870D1 (de) * 2002-05-23 2011-03-03 Infineon Technologies Ag Anordnung zur In-Circuit-Emulation einer programmgesteuerten Einheit
JP4310100B2 (ja) * 2002-11-29 2009-08-05 Ｏｋｉセミコンダクタ株式会社 フィールドメモリ
JP4115976B2 (ja) * 2003-09-16 2008-07-09 株式会社東芝 半導体記憶装置
RU2263951C2 (ru) * 2004-02-02 2005-11-10 Огородник Дмитрий Викторович Способ обработки цифровых данных в запоминающем устройстве и запоминающее устройство для осуществления способа
US20070217247A1 (en) * 2006-03-15 2007-09-20 Zhanping Chen Shared sense amplifier for fuse cell
US7602663B2 (en) * 2006-12-22 2009-10-13 Intel Corporation Fuse cell array with redundancy features
US9423843B2 (en) * 2012-09-21 2016-08-23 Atmel Corporation Processor maintaining reset-state after reset signal is suspended
US10120740B2 (en) * 2016-03-22 2018-11-06 Micron Technology, Inc. Apparatus and methods for debugging on a memory device
US12376291B2 (en) 2020-09-04 2025-07-29 Changxin Memory Technologies, Inc. Semiconductor device including shared sense amplification circuit group
CN114155896B (zh) * 2020-09-04 2024-03-29 长鑫存储技术有限公司 半导体装置

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5291425A (en) * 1990-11-28 1994-03-01 Nec Corporation Test mode setting arrangement for use in microcomputer

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5947658A (ja) * 1982-09-13 1984-03-17 Fujitsu Ltd デ−タ処理装置の診断方式
NL8901376A (nl) * 1989-05-31 1990-12-17 Philips Nv Geintegreerde geheugenschakeling met een leesversterker.
US5123107A (en) * 1989-06-20 1992-06-16 Mensch Jr William D Topography of CMOS microcomputer integrated circuit chip including core processor and memory, priority, and I/O interface circuitry coupled thereto
JPH04304532A (ja) * 1991-04-02 1992-10-27 Nec Corp Ｒｏｍ化プログラムのデバッグ機能付コンピュータ
US5640542A (en) * 1993-10-29 1997-06-17 Intel Corporation On-chip in-circuit-emulator memory mapping and breakpoint register modules
JPH07302254A (ja) * 1994-05-06 1995-11-14 Mitsubishi Electric Corp マイクロコンピュータシステム
EP0715258B1 (en) * 1994-07-22 1998-10-07 Advanced Micro Devices, Inc. Improved computer system
US5623673A (en) * 1994-07-25 1997-04-22 Advanced Micro Devices, Inc. System management mode and in-circuit emulation memory mapping and locking method
JPH08273362A (ja) * 1995-03-30 1996-10-18 Nec Ic Microcomput Syst Ltd 半導体記憶装置
JPH0973778A (ja) * 1995-09-01 1997-03-18 Texas Instr Japan Ltd アドレスアクセスパスのコントロール回路
US5877780A (en) * 1996-08-08 1999-03-02 Lu; Hsuehchung Shelton Semiconductor chip having multiple independent memory sections, at least one of which includes simultaneously accessible arrays
JPH10135424A (ja) * 1996-11-01 1998-05-22 Mitsubishi Electric Corp 半導体集積回路装置

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5291425A (en) * 1990-11-28 1994-03-01 Nec Corporation Test mode setting arrangement for use in microcomputer

Also Published As

Publication number Publication date
US5983367A (en) 1999-11-09
CN1182917A (zh) 1998-05-27
TW332341B (en) 1998-05-21
CN1132111C (zh) 2003-12-24
KR19980032077A (ko) 1998-07-25
JPH10133908A (ja) 1998-05-22
DE19721516A1 (de) 1998-05-07

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee