DE19610112A1 - Auflöten von Halbleiterchips - Google Patents
Auflöten von HalbleiterchipsInfo
- Publication number
- DE19610112A1 DE19610112A1 DE19610112A DE19610112A DE19610112A1 DE 19610112 A1 DE19610112 A1 DE 19610112A1 DE 19610112 A DE19610112 A DE 19610112A DE 19610112 A DE19610112 A DE 19610112A DE 19610112 A1 DE19610112 A1 DE 19610112A1
- Authority
- DE
- Germany
- Prior art keywords
- solder
- soldering
- substrate
- chips
- mentioned
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
- H01L24/75—Apparatus for connecting with bump connectors or layer connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K2101/00—Articles made by soldering, welding or cutting
- B23K2101/36—Electric or electronic devices
- B23K2101/40—Semiconductor devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/292—Material of the matrix with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8312—Aligning
- H01L2224/83136—Aligning involving guiding structures, e.g. spacers or supporting members
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0102—Calcium [Ca]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01068—Erbium [Er]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
- H01L2924/01322—Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/1901—Structure
- H01L2924/1904—Component type
- H01L2924/19042—Component type being an inductor
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Die Bonding (AREA)
Description
- 1. Reflowlöten mit Lotpaste und aggressiven Flußmitteln.
- 2. Löten im Vakuum.
- 3. Einsetzen der Chips in ein flüssiges Lot.
- 1. Einsetzen der Leiterplatten? 20 auf die Heizplatte (ca. 250°C)
- 2. Ansaugen der Leistungshalbleiter 1 über Vakuum V1 aus einem Bestücknest mit dem "Deckel" 3 und seitenstabile Halterungen der mehreren Chips 1, wobei sie in Vertikalrichtung elastisch oder federnd nachgiebig positioniert sind, z. B. über eine Siliconmatte oder einzelne (individuelle) Sauger 2.
- 3. Aufsetzen des Deckels 3 über der beiterplatte (mechanisch zentriert), um einen umfänglich abgedichteten Vakuumraum 30 zu bilden.
- 4. Mit Schutzgas spülen.
- 5. Vakuum V2 einschalten nach Erreichen der Schmelztemperatur des Lotes 9 und Evakuieren des Vakuumraums 30 (Lötraum) Deckel mit Chips wird durch das Vakuum V2 zwischen der Heizplatte 4 und dem Deckel 3 abgesenkt in das flüssige Lot. Keine seitliche Verrückung der Chips tritt beim vakuum forcierten Ansaugen des Deckelteils auf, allenfalls beim Aufdrücken des Chips 1 tritt eine elastische Komponente in Bewegungsrichtung hinzu, die die Chips 1 gegen die Kornbestandteile 10 im Lot 9 drückt und damit großflächig für einen gleichmäßigen Abstand ohne Beschädigung des Halbleiterchips 1 sorgt.
- 7. Löten.
- 8. Kaltes Gas B unter die Leiterkarte blasen und damit die Leiterkarte auf einem Gaspolster 5 abkühlen, gleichzeitig wird das Vakuum im Lötraum 30 kontinuierlich beendet und der Deckel 3a, 3b entfernt sich ebenso kontinuierlich von der Heizplatte 4 in eine Endlage, die er vor Einschalten des Vakuums eingenommen hatte. Dabei werden die Chips 1 mit dem angelöteten Substrat 20 mitgenommen. Auch das Substrat hebt also von der Heizplatte 4 ab.
- 9. Deckel mit gelöteter Leiterkarte 20 abnehmen und Leistungshalbleiter mit Leiterkarte (Substrat; 20) freigeben.
Claims (13)
einer Heizplatte (4) mit wenigstens einer Öffnung (4c) zum Einblasen von Kühlmedium (B);
einer Vorrichtung zum Aufsetzen des Deckel (3) und zur vorherigen Bestückung der Heizplatte (4) mit einer Leiterkarte (Substrat).
- a) die Körner im Durchmesser auf den zu erreichenden Abstand zwischen einem Substrat (20) und dem Halbleiterchip (1) abgestimmt sind; und/oder
- b) der Anteil der Körner gegenüber dem Lotbestandteil wenige Gewichtsprozente beträgt, insbesondere unter 20% liegt.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19610112A DE19610112C2 (de) | 1996-03-14 | 1996-03-14 | Verfahren zum Auflöten von Halbleiterchips |
DE19649458A DE19649458A1 (de) | 1996-03-14 | 1996-03-14 | Lotmaterial zur Anbringung von großen Halbleiterchips |
EP97104275A EP0795891A3 (de) | 1996-03-14 | 1997-03-13 | Auflöten von Halbleiterchips |
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE19610112A DE19610112C2 (de) | 1996-03-14 | 1996-03-14 | Verfahren zum Auflöten von Halbleiterchips |
DE19649458A DE19649458A1 (de) | 1996-03-14 | 1996-03-14 | Lotmaterial zur Anbringung von großen Halbleiterchips |
Publications (2)
Publication Number | Publication Date |
---|---|
DE19610112A1 true DE19610112A1 (de) | 1997-09-18 |
DE19610112C2 DE19610112C2 (de) | 2000-04-06 |
Family
ID=26023816
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19610112A Expired - Fee Related DE19610112C2 (de) | 1996-03-14 | 1996-03-14 | Verfahren zum Auflöten von Halbleiterchips |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE19610112C2 (de) |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2004026531A2 (de) * | 2002-09-12 | 2004-04-01 | Süss MicroTec Laboratory Equipment GmbH | Vorrichtung und verfahren für das verbinden von objekten |
US6972069B2 (en) | 2000-09-29 | 2005-12-06 | Infineon Technologies Ag | Device and method for connecting two wafers in a planar manner for grinding down and cutting up a product wafer |
WO2008071590A1 (de) * | 2006-12-11 | 2008-06-19 | Robert Bosch Gmbh | Handhabungswerkzeug für bauelemente, insbesondere elektronische bauelemente |
DE10013255B4 (de) * | 1999-03-18 | 2009-12-17 | Hitachi, Ltd. | Harzgekapselte elektronische Vorrichtung zur Verwendung in Brennkraftmaschinen |
DE102012105297A1 (de) * | 2012-06-19 | 2013-12-19 | Endress + Hauser Gmbh + Co. Kg | Verfahren zum Verbinden eines Bauteils mit einem Träger über eine Lötung und Bauteil zum Verbinden mit einem Träger |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10019443A1 (de) * | 2000-04-19 | 2001-10-31 | Texas Instruments Deutschland | Vorrichtung zum Befestigen eines Halbleiter-Chips auf einem Chip-Träger |
DE10200372A1 (de) * | 2002-01-08 | 2003-07-24 | Siemens Ag | Leistungshalbleitermodul |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0110307A2 (de) * | 1982-11-24 | 1984-06-13 | Samsung Electronics Co., Ltd. | Halbleiterwürfel-Hefttechnik und Verbindung dafür |
EP0329823A2 (de) * | 1988-02-22 | 1989-08-30 | E.I. Du Pont De Nemours And Company | Werkzeug zum Aufnehmen von Chip-Haltern |
EP0361715A1 (de) * | 1988-09-12 | 1990-04-04 | The Regents Of The University Of California | Vakuum-Chipanschluss für integrierte Schaltungen |
US5445692A (en) * | 1992-11-26 | 1995-08-29 | Sumitomo Electric Industries, Ltd. | Process for reinforcing a semiconductor wafer |
DE4417285A1 (de) * | 1994-05-13 | 1995-11-16 | Finetech Ges Fuer Elektronik T | Werkzeug zum Löten von elektronischen Schaltkreisen |
-
1996
- 1996-03-14 DE DE19610112A patent/DE19610112C2/de not_active Expired - Fee Related
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0110307A2 (de) * | 1982-11-24 | 1984-06-13 | Samsung Electronics Co., Ltd. | Halbleiterwürfel-Hefttechnik und Verbindung dafür |
EP0329823A2 (de) * | 1988-02-22 | 1989-08-30 | E.I. Du Pont De Nemours And Company | Werkzeug zum Aufnehmen von Chip-Haltern |
EP0361715A1 (de) * | 1988-09-12 | 1990-04-04 | The Regents Of The University Of California | Vakuum-Chipanschluss für integrierte Schaltungen |
US5445692A (en) * | 1992-11-26 | 1995-08-29 | Sumitomo Electric Industries, Ltd. | Process for reinforcing a semiconductor wafer |
DE4417285A1 (de) * | 1994-05-13 | 1995-11-16 | Finetech Ges Fuer Elektronik T | Werkzeug zum Löten von elektronischen Schaltkreisen |
Non-Patent Citations (2)
Title |
---|
CHEN, Cherh-Lin, et.al.: Packing Technology for a Low Temperature Astrometric Sensor Array. In: IEEE Transactions On Components, Hybrids, And Manufacturing Technology, Vol.13, No.4, Dec. 1990, S.1083-1089 * |
FAIRFULL,R.A., et.al.: Chip-Heatsink Attach Using Contoured Adhesive With Glass Stand-Offs. In: IBM Technical Disclosure Bulletin, Vol.34, No.3, Aug. 1991, S.161,162 * |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE10013255B4 (de) * | 1999-03-18 | 2009-12-17 | Hitachi, Ltd. | Harzgekapselte elektronische Vorrichtung zur Verwendung in Brennkraftmaschinen |
US6972069B2 (en) | 2000-09-29 | 2005-12-06 | Infineon Technologies Ag | Device and method for connecting two wafers in a planar manner for grinding down and cutting up a product wafer |
WO2004026531A2 (de) * | 2002-09-12 | 2004-04-01 | Süss MicroTec Laboratory Equipment GmbH | Vorrichtung und verfahren für das verbinden von objekten |
WO2004026531A3 (de) * | 2002-09-12 | 2004-05-27 | Suess Microtec Lab Equipment G | Vorrichtung und verfahren für das verbinden von objekten |
WO2008071590A1 (de) * | 2006-12-11 | 2008-06-19 | Robert Bosch Gmbh | Handhabungswerkzeug für bauelemente, insbesondere elektronische bauelemente |
US8262146B2 (en) | 2006-12-11 | 2012-09-11 | Robert Bosch Gmbh | Handling tools for components, in particular eletronic components |
DE102012105297A1 (de) * | 2012-06-19 | 2013-12-19 | Endress + Hauser Gmbh + Co. Kg | Verfahren zum Verbinden eines Bauteils mit einem Träger über eine Lötung und Bauteil zum Verbinden mit einem Träger |
DE102012105297A8 (de) * | 2012-06-19 | 2014-03-20 | Endress + Hauser Gmbh + Co. Kg | Verfahren zum Verbinden eines Bauteils mit einem Träger über eine Lötung und Bauteil zum Verbinden mit einem Träger |
US10099318B2 (en) | 2012-06-19 | 2018-10-16 | Endress+Hauser Se+Co.Kg | Method for connecting a component to a support via soldering and component connectable with a support |
Also Published As
Publication number | Publication date |
---|---|
DE19610112C2 (de) | 2000-04-06 |
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