DE1544306A1 - Verfahren zum Herstellen von Halbleiteranordnungen - Google Patents
Verfahren zum Herstellen von HalbleiteranordnungenInfo
- Publication number
- DE1544306A1 DE1544306A1 DE19641544306 DE1544306A DE1544306A1 DE 1544306 A1 DE1544306 A1 DE 1544306A1 DE 19641544306 DE19641544306 DE 19641544306 DE 1544306 A DE1544306 A DE 1544306A DE 1544306 A1 DE1544306 A1 DE 1544306A1
- Authority
- DE
- Germany
- Prior art keywords
- mask
- dai
- aua
- τοη
- silicon
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/10—Lift-off masking
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/105—Masks, metal
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/106—Masks, special
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/942—Masking
- Y10S438/945—Special, e.g. metal
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Chemical Vapour Deposition (AREA)
- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Vapour Deposition (AREA)
- Electron Beam Exposure (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
- Drying Of Semiconductors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB523263 | 1963-02-08 | ||
GB5233/63A GB998199A (en) | 1963-02-08 | 1963-02-08 | Improvements in or relating to the manufacture of semiconductor devices |
Publications (1)
Publication Number | Publication Date |
---|---|
DE1544306A1 true DE1544306A1 (de) | 1969-07-10 |
Family
ID=26239738
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE19641544306 Pending DE1544306A1 (de) | 1963-02-08 | 1964-01-31 | Verfahren zum Herstellen von Halbleiteranordnungen |
Country Status (6)
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3634150A (en) * | 1969-06-25 | 1972-01-11 | Gen Electric | Method for forming epitaxial crystals or wafers in selected regions of substrates |
JPS4926747B1 (US20040242566A1-20041202-C00155.png) * | 1970-10-09 | 1974-07-11 | ||
DE2151127C3 (de) * | 1970-12-16 | 1981-04-16 | International Business Machines Corp., 10504 Armonk, N.Y. | Verfahren zum Abscheiden eines Metallisierungsmusters und seine Anwendung |
DE2160008B2 (de) * | 1971-12-03 | 1973-11-15 | Robert Bosch Gmbh, 7000 Stuttgart | Verfahren und Vorrichtung zur Herstellung eines Musters in einer auf einem Träger aufgedampften Metallschicht und dessen Verwendung |
FR2252638B1 (US20040242566A1-20041202-C00155.png) * | 1973-11-23 | 1978-08-04 | Commissariat Energie Atomique | |
FR2459551A1 (fr) * | 1979-06-19 | 1981-01-09 | Thomson Csf | Procede et structure de passivation a autoalignement sur l'emplacement d'un masque |
US4453306A (en) * | 1983-05-27 | 1984-06-12 | At&T Bell Laboratories | Fabrication of FETs |
US4637129A (en) * | 1984-07-30 | 1987-01-20 | At&T Bell Laboratories | Selective area III-V growth and lift-off using tungsten patterning |
Family Cites Families (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
NL242671A (US20040242566A1-20041202-C00155.png) * | 1959-08-25 | |||
US3140965A (en) * | 1961-07-22 | 1964-07-14 | Siemens Ag | Vapor deposition onto stacked semiconductor wafers followed by particular cooling |
US3210225A (en) * | 1961-08-18 | 1965-10-05 | Texas Instruments Inc | Method of making transistor |
US3243323A (en) * | 1962-06-11 | 1966-03-29 | Motorola Inc | Gas etching |
-
0
- GB GB1051451D patent/GB1051451A/en active Active
- NL NL302322D patent/NL302322A/xx unknown
- NL NL302323D patent/NL302323A/xx unknown
-
1963
- 1963-02-08 GB GB5233/63A patent/GB998199A/en not_active Expired
-
1964
- 1964-01-27 US US340443A patent/US3306788A/en not_active Expired - Lifetime
- 1964-01-31 DE DE19641544306 patent/DE1544306A1/de active Pending
- 1964-02-04 CH CH130364A patent/CH418466A/de unknown
- 1964-02-07 BE BE643485D patent/BE643485A/xx unknown
- 1964-02-07 BE BE643486D patent/BE643486A/xx unknown
Also Published As
Publication number | Publication date |
---|---|
US3306788A (en) | 1967-02-28 |
GB998199A (en) | 1965-07-14 |
BE643485A (US20040242566A1-20041202-C00155.png) | 1964-08-07 |
NL302322A (US20040242566A1-20041202-C00155.png) | |
BE643486A (US20040242566A1-20041202-C00155.png) | 1964-08-07 |
CH418466A (de) | 1966-08-15 |
NL302323A (US20040242566A1-20041202-C00155.png) | |
GB1051451A (US20040242566A1-20041202-C00155.png) |
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