DE1514929C3 - Verfahren zum Herstellen von Halbleiterschaltungselementen in einem Halbleitersubstrat mit Halbleiterbereichen von niedrigem spezifischen Widerstand - Google Patents

Verfahren zum Herstellen von Halbleiterschaltungselementen in einem Halbleitersubstrat mit Halbleiterbereichen von niedrigem spezifischen Widerstand

Info

Publication number
DE1514929C3
DE1514929C3 DE1514929A DE1514929A DE1514929C3 DE 1514929 C3 DE1514929 C3 DE 1514929C3 DE 1514929 A DE1514929 A DE 1514929A DE 1514929 A DE1514929 A DE 1514929A DE 1514929 C3 DE1514929 C3 DE 1514929C3
Authority
DE
Germany
Prior art keywords
semiconductor
areas
low
circuit elements
specific resistance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE1514929A
Other languages
German (de)
English (en)
Other versions
DE1514929B2 (de
DE1514929A1 (de
Inventor
Earl Glynn Richardson Alexander
Kenneth Elwood Richardson Bean
Paul Stanley Dallas Gleim
Walter Richard Dallas Runyan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Texas Instruments Inc
Original Assignee
Texas Instruments Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of DE1514929A1 publication Critical patent/DE1514929A1/de
Publication of DE1514929B2 publication Critical patent/DE1514929B2/de
Application granted granted Critical
Publication of DE1514929C3 publication Critical patent/DE1514929C3/de
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0112Integrating together multiple components covered by H10D8/00, H10D10/00 or H10D18/00, e.g. integrating multiple BJTs
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
    • H01L21/02373Group 14 semiconducting materials
    • H01L21/02381Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/0262Reduction or decomposition of gaseous compounds, e.g. CVD
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02612Formation types
    • H01L21/02617Deposition types
    • H01L21/02636Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639Preparation of substrate for selective deposition
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76297Dielectric isolation using EPIC techniques, i.e. epitaxial passivated integrated circuit
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Element Separation (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Bipolar Transistors (AREA)
DE1514929A 1965-02-26 1966-02-18 Verfahren zum Herstellen von Halbleiterschaltungselementen in einem Halbleitersubstrat mit Halbleiterbereichen von niedrigem spezifischen Widerstand Expired DE1514929C3 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US43563465A 1965-02-26 1965-02-26
US43563365A 1965-02-26 1965-02-26

Publications (3)

Publication Number Publication Date
DE1514929A1 DE1514929A1 (de) 1972-02-03
DE1514929B2 DE1514929B2 (de) 1972-12-21
DE1514929C3 true DE1514929C3 (de) 1974-01-31

Family

ID=27030617

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1514929A Expired DE1514929C3 (de) 1965-02-26 1966-02-18 Verfahren zum Herstellen von Halbleiterschaltungselementen in einem Halbleitersubstrat mit Halbleiterbereichen von niedrigem spezifischen Widerstand

Country Status (4)

Country Link
JP (1) JPS5431954B1 (enrdf_load_stackoverflow)
DE (1) DE1514929C3 (enrdf_load_stackoverflow)
GB (1) GB1131229A (enrdf_load_stackoverflow)
SE (1) SE319559B (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
GB1131229A (en) 1968-10-23
JPS5431954B1 (enrdf_load_stackoverflow) 1979-10-11
DE1514929B2 (de) 1972-12-21
SE319559B (enrdf_load_stackoverflow) 1970-01-19
DE1514929A1 (de) 1972-02-03

Similar Documents

Publication Publication Date Title
DE2745857C2 (enrdf_load_stackoverflow)
DE2640525C2 (de) Verfahren zur Herstellung einer MIS-Halbleiterschaltungsanordnung
EP0001574B1 (de) Halbleiteranordnung für Widerstandsstrukturen in hochintegrierten Schaltkreisen und Verfahren zur Herstellung dieser Halbleiteranordnung
DE1544329A1 (de) Verfahren zur Herstellung epitaxialer Schichten bestimmter Form
DE2125303A1 (de) Verfahren zur Herstellung einer Halbleiteranordnung und durch dieses Verfahren hergestellte Halbleiteranordnung
DE1439935A1 (de) Halbleitereinrichtung und Verfahren zu deren Herstellung
DE2749607C3 (de) Halbleiteranordnung und Verfahren zu deren Herstellung
DE2320265A1 (de) Halbleitervorrichtung und verfahren zu ihrer herstellung
DE1926884A1 (de) Halbleiterbauelement und Verfahren zu seiner Herstellung
DE1564191B2 (de) Verfahren zum herstellen einer integrierten halbleiterschaltung mit verschiedenen, gegeneinander und gegen ein gemeinsames siliziumsubstrat elektrisch isolierten schaltungselementen
DE1298189B (de) Verfahren zum Herstellen von isolierten Bereichen in einer integrierten Halbleiter-Schaltung
DE1789024A1 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE3131991C2 (de) Verfahren zum Herstellen einer Zenerdiode
DE4101130A1 (de) Mos-feldeffekttransistor und verfahren zu dessen herstellung
DE1965406A1 (de) Monolithische integrierte Schaltungen und Verfahren zu ihrer Herstellung
DE1814747C2 (de) Verfahren zum Herstellen von Feldefekttransistoren
DE1248168B (de) Verfahren zur Herstellung von Halbleiteranordnungen
DE2904480B2 (de) Integrierte Halbleiterschaltung und Verfahren zu ihrem Herstellen
DE2014797B2 (de) Verfahren zum Herstellen von Halbleiterschaltelementen jn einer integrierten Halbleiterschaltung
DE2703618C2 (de) Verfahren zur Herstellung eines integrierten Halbleiterschaltkreises
DE1514929C3 (de) Verfahren zum Herstellen von Halbleiterschaltungselementen in einem Halbleitersubstrat mit Halbleiterbereichen von niedrigem spezifischen Widerstand
DE2742385A1 (de) Verbundbauelement mit einer epitaxial aufgewachsenen silizium-insel
DE3015101C2 (enrdf_load_stackoverflow)
DE2840975A1 (de) Verfahren zur herstellung einer integrierten halbleiterschaltung
DE2151346C3 (de) Verfahren zum Herstellung einer aus Einkristallschichtteilen und Polykristallschichtteilen bestehenden Halbleiterschicht auf einem Einkristallkörper

Legal Events

Date Code Title Description
C3 Grant after two publication steps (3rd publication)
E77 Valid patent as to the heymanns-index 1977
8339 Ceased/non-payment of the annual fee