DE1439938A1 - Hochfrequenz-Halbleitervorrichtung und Verfahren zu ihrer Herstellung - Google Patents

Hochfrequenz-Halbleitervorrichtung und Verfahren zu ihrer Herstellung

Info

Publication number
DE1439938A1
DE1439938A1 DE19621439938 DE1439938A DE1439938A1 DE 1439938 A1 DE1439938 A1 DE 1439938A1 DE 19621439938 DE19621439938 DE 19621439938 DE 1439938 A DE1439938 A DE 1439938A DE 1439938 A1 DE1439938 A1 DE 1439938A1
Authority
DE
Germany
Prior art keywords
layer
oxide layer
metallic layer
metallic
semiconductor device
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE19621439938
Other languages
German (de)
English (en)
Inventor
Davis Ronald Edward
Nelson James Thomas
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
Western Electric Co Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Western Electric Co Inc filed Critical Western Electric Co Inc
Publication of DE1439938A1 publication Critical patent/DE1439938A1/de
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76897Formation of self-aligned vias or contact plugs, i.e. involving a lithographically uncritical step
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
  • Thyristors (AREA)
DE19621439938 1961-12-19 1962-12-13 Hochfrequenz-Halbleitervorrichtung und Verfahren zu ihrer Herstellung Pending DE1439938A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US16059161A 1961-12-19 1961-12-19

Publications (1)

Publication Number Publication Date
DE1439938A1 true DE1439938A1 (de) 1968-12-19

Family

ID=22577517

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19621439938 Pending DE1439938A1 (de) 1961-12-19 1962-12-13 Hochfrequenz-Halbleitervorrichtung und Verfahren zu ihrer Herstellung

Country Status (5)

Country Link
BE (1) BE626251A (US07714131-20100511-C00038.png)
DE (1) DE1439938A1 (US07714131-20100511-C00038.png)
FR (1) FR1339897A (US07714131-20100511-C00038.png)
GB (1) GB954534A (US07714131-20100511-C00038.png)
NL (1) NL285921A (US07714131-20100511-C00038.png)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1273698B (de) * 1964-01-08 1968-07-25 Telefunken Patent Halbleiteranordnung
CA941074A (en) * 1964-04-16 1974-01-29 Northern Electric Company Limited Semiconductor devices with field electrodes
US3446995A (en) * 1964-05-27 1969-05-27 Ibm Semiconductor circuits,devices and methods of improving electrical characteristics of latter
US3312871A (en) * 1964-12-23 1967-04-04 Ibm Interconnection arrangement for integrated circuits
US3600648A (en) * 1965-04-21 1971-08-17 Sylvania Electric Prod Semiconductor electrical translating device
DE1514563A1 (de) * 1965-09-07 1969-06-19 Semikron Gleichrichterbau Steuerbares Halbleiterbauelement
US3651384A (en) * 1971-03-08 1972-03-21 Warren P Waters Planar schottky barrier

Also Published As

Publication number Publication date
GB954534A (en) 1964-04-08
BE626251A (US07714131-20100511-C00038.png)
NL285921A (US07714131-20100511-C00038.png)
FR1339897A (fr) 1963-10-11

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