DE112020007650T5 - Halbleitereinheit und verfahren zur herstellung einer halbleitereinheit - Google Patents

Halbleitereinheit und verfahren zur herstellung einer halbleitereinheit Download PDF

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Publication number
DE112020007650T5
DE112020007650T5 DE112020007650.4T DE112020007650T DE112020007650T5 DE 112020007650 T5 DE112020007650 T5 DE 112020007650T5 DE 112020007650 T DE112020007650 T DE 112020007650T DE 112020007650 T5 DE112020007650 T5 DE 112020007650T5
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DE
Germany
Prior art keywords
termination
gate
trench
layer
insulating film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE112020007650.4T
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German (de)
English (en)
Inventor
Toshiaki Iwamatsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE112020007650T5 publication Critical patent/DE112020007650T5/de
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/01Manufacture or treatment
    • H10D12/031Manufacture or treatment of IGBTs
    • H10D12/032Manufacture or treatment of IGBTs of vertical IGBTs
    • H10D12/038Manufacture or treatment of IGBTs of vertical IGBTs having a recessed gate, e.g. trench-gate IGBTs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/028Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs
    • H10D30/0291Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs
    • H10D30/0297Manufacture or treatment of FETs having insulated gates [IGFET] of double-diffused metal oxide semiconductor [DMOS] FETs of vertical DMOS [VDMOS] FETs using recessing of the gate electrodes, e.g. to form trench gate electrodes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/665Vertical DMOS [VDMOS] FETs having edge termination structures
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/64Double-diffused metal-oxide semiconductor [DMOS] FETs
    • H10D30/66Vertical DMOS [VDMOS] FETs
    • H10D30/668Vertical DMOS [VDMOS] FETs having trench gate electrodes, e.g. UMOS transistors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/102Constructional design considerations for preventing surface leakage or controlling electric field concentration
    • H10D62/103Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices
    • H10D62/105Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE] 
    • H10D62/106Constructional design considerations for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse-biased devices by having particular doping profiles, shapes or arrangements of PN junctions; by having supplementary regions, e.g. junction termination extension [JTE]  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions
    • H10D62/107Buried supplementary regions, e.g. buried guard rings 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H10D62/832Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge being Group IV materials comprising two or more elements, e.g. SiGe
    • H10D62/8325Silicon carbide
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/519Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their top-view geometrical layouts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D12/00Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT]
    • H10D12/411Insulated-gate bipolar transistors [IGBT]
    • H10D12/441Vertical IGBTs
    • H10D12/461Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions
    • H10D12/481Vertical IGBTs having non-planar surfaces, e.g. having trenches, recesses or pillars in the surfaces of the emitter, base or collector regions having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs

Landscapes

  • Electrodes Of Semiconductors (AREA)
DE112020007650.4T 2020-09-30 2020-09-30 Halbleitereinheit und verfahren zur herstellung einer halbleitereinheit Withdrawn DE112020007650T5 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/JP2020/037139 WO2022070304A1 (ja) 2020-09-30 2020-09-30 半導体装置および半導体装置の製造方法

Publications (1)

Publication Number Publication Date
DE112020007650T5 true DE112020007650T5 (de) 2023-07-13

Family

ID=80951544

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112020007650.4T Withdrawn DE112020007650T5 (de) 2020-09-30 2020-09-30 Halbleitereinheit und verfahren zur herstellung einer halbleitereinheit

Country Status (5)

Country Link
US (1) US20230246101A1 (https=)
JP (1) JP7330392B2 (https=)
CN (1) CN116325175B (https=)
DE (1) DE112020007650T5 (https=)
WO (1) WO2022070304A1 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN117038732B (zh) * 2023-07-15 2024-09-27 湖北九峰山实验室 一种宽禁带半导体沟槽mosfet器件及其制作方法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006520091A (ja) 2003-03-05 2006-08-31 アドバンスト・アナロジック・テクノロジーズ・インコーポレイテッド 平坦化したゲートバスを備えたトレンチ・パワーmosfet

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6838722B2 (en) 2002-03-22 2005-01-04 Siliconix Incorporated Structures of and methods of fabricating trench-gated MIS devices
DE102005008354B4 (de) * 2005-02-23 2007-12-27 Infineon Technologies Austria Ag Halbleiterbauteil sowie Verfahren zu dessen Herstellung
JP2010251422A (ja) 2009-04-13 2010-11-04 Renesas Electronics Corp 半導体装置及びその製造方法
US8319282B2 (en) * 2010-07-09 2012-11-27 Infineon Technologies Austria Ag High-voltage bipolar transistor with trench field plate
JP6135181B2 (ja) * 2013-02-26 2017-05-31 サンケン電気株式会社 半導体装置
DE112015004374B4 (de) 2014-09-26 2019-02-14 Mitsubishi Electric Corporation Halbleitervorrichtung
CN107683530B (zh) * 2015-06-09 2020-08-18 三菱电机株式会社 电力用半导体装置
CN107644902A (zh) * 2016-07-22 2018-01-30 三垦电气株式会社 半导体装置
JP6967907B2 (ja) * 2017-08-07 2021-11-17 ルネサスエレクトロニクス株式会社 半導体装置及び半導体装置の製造方法
US10580888B1 (en) * 2018-08-08 2020-03-03 Infineon Technologies Austria Ag Oxygen inserted Si-layers for reduced contact implant outdiffusion in vertical power devices
TWI684276B (zh) * 2019-01-11 2020-02-01 力源半導體股份有限公司 溝渠式功率電晶體及其製作方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006520091A (ja) 2003-03-05 2006-08-31 アドバンスト・アナロジック・テクノロジーズ・インコーポレイテッド 平坦化したゲートバスを備えたトレンチ・パワーmosfet

Also Published As

Publication number Publication date
WO2022070304A1 (ja) 2022-04-07
CN116325175A (zh) 2023-06-23
JPWO2022070304A1 (https=) 2022-04-07
CN116325175B (zh) 2024-12-03
US20230246101A1 (en) 2023-08-03
JP7330392B2 (ja) 2023-08-21

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Ipc: H10D0030600000

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