DE112009002118B4 - Verfahren zum Formen von aluminiumdotierten Metall-Carbonitrid-Gate-Elektroden - Google Patents

Verfahren zum Formen von aluminiumdotierten Metall-Carbonitrid-Gate-Elektroden Download PDF

Info

Publication number
DE112009002118B4
DE112009002118B4 DE112009002118T DE112009002118T DE112009002118B4 DE 112009002118 B4 DE112009002118 B4 DE 112009002118B4 DE 112009002118 T DE112009002118 T DE 112009002118T DE 112009002118 T DE112009002118 T DE 112009002118T DE 112009002118 B4 DE112009002118 B4 DE 112009002118B4
Authority
DE
Germany
Prior art keywords
metal carbonitride
precursor
aluminum
carbonitride
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE112009002118T
Other languages
German (de)
English (en)
Other versions
DE112009002118T5 (de
Inventor
Toshio Hasegawa
Gerrit J. Leusink
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Electron Ltd
Original Assignee
Tokyo Electron Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Electron Ltd filed Critical Tokyo Electron Ltd
Publication of DE112009002118T5 publication Critical patent/DE112009002118T5/de
Application granted granted Critical
Publication of DE112009002118B4 publication Critical patent/DE112009002118B4/de
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/80—FETs having rectifying junction gate electrodes
    • H10D30/83—FETs having PN junction gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28088—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a composite, e.g. TiN
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
    • H10D64/691—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator comprising metallic compounds, e.g. metal oxides or metal silicates 

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Composite Materials (AREA)
  • Chemical & Material Sciences (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE112009002118T 2008-08-25 2009-08-22 Verfahren zum Formen von aluminiumdotierten Metall-Carbonitrid-Gate-Elektroden Expired - Fee Related DE112009002118B4 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/197,756 2008-08-25
US12/197,756 US7985680B2 (en) 2008-08-25 2008-08-25 Method of forming aluminum-doped metal carbonitride gate electrodes
PCT/US2009/054707 WO2010027715A1 (en) 2008-08-25 2009-08-22 Method for forming aluminum-doped metal carbonitride gate electrodes

Publications (2)

Publication Number Publication Date
DE112009002118T5 DE112009002118T5 (de) 2011-07-28
DE112009002118B4 true DE112009002118B4 (de) 2013-03-07

Family

ID=41696772

Family Applications (1)

Application Number Title Priority Date Filing Date
DE112009002118T Expired - Fee Related DE112009002118B4 (de) 2008-08-25 2009-08-22 Verfahren zum Formen von aluminiumdotierten Metall-Carbonitrid-Gate-Elektroden

Country Status (7)

Country Link
US (1) US7985680B2 (enExample)
JP (1) JP5529134B2 (enExample)
KR (1) KR101503969B1 (enExample)
CN (1) CN102132389B (enExample)
DE (1) DE112009002118B4 (enExample)
TW (1) TWI438832B (enExample)
WO (1) WO2010027715A1 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20100102393A1 (en) * 2008-10-29 2010-04-29 Chartered Semiconductor Manufacturing, Ltd. Metal gate transistors
JP2014222723A (ja) * 2013-05-14 2014-11-27 独立行政法人産業技術総合研究所 電界効果型半導体装置及びその製造方法
US9552979B2 (en) * 2013-05-31 2017-01-24 Asm Ip Holding B.V. Cyclic aluminum nitride deposition in a batch reactor
US9224594B2 (en) 2013-11-18 2015-12-29 Intermolecular, Inc. Surface preparation with remote plasma
TWI611045B (zh) 2014-02-03 2018-01-11 Tokyo Electron Limited 用於無孔隙銅填充之ald阻障層及cvd釕襯墊之整合
US10163644B2 (en) 2014-02-07 2018-12-25 Taiwan Semiconductor Manufacturing Company Interconnect structure including a conductive feature and a barrier layer on sidewalls and a bottom surface of the conductive feature and method of forming the same
TWI556429B (zh) 2014-07-10 2016-11-01 台灣積體電路製造股份有限公司 積體電路裝置與其形成方法
DE102014119644B4 (de) 2014-07-10 2024-10-02 Taiwan Semiconductor Manufacturing Company, Ltd. Metalgatestapel mit TiAICN als Arbeitsfunktionsschicht und/oder Sperr/Benetzungsschicht und Verfahren
US10002936B2 (en) * 2014-10-23 2018-06-19 Asm Ip Holding B.V. Titanium aluminum and tantalum aluminum thin films
CN109285879B (zh) * 2017-07-20 2021-06-08 中芯国际集成电路制造(上海)有限公司 半导体结构及其形成方法
US10665685B2 (en) 2017-11-30 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and fabrication method thereof
US12482648B2 (en) 2018-10-02 2025-11-25 Asm Ip Holding B.V. Selective passivation and selective deposition
JP2020056104A (ja) 2018-10-02 2020-04-09 エーエスエム アイピー ホールディング ビー．ブイ． 選択的パッシベーションおよび選択的堆積
US11251261B2 (en) * 2019-05-17 2022-02-15 Micron Technology, Inc. Forming a barrier material on an electrode
US11456177B2 (en) * 2020-09-22 2022-09-27 Nanya Technology Corporation Method of manufacturing semiconductor device
TW202248447A (zh) * 2021-03-08 2022-12-16 荷蘭商Ａｓｍ Ｉｐ私人控股有限公司 用於形成包含有鋁、鈦、與碳之層的方法及系統

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070059929A1 (en) * 2004-06-25 2007-03-15 Hag-Ju Cho Method of forming a tantalum carbon nitride layer and method of manufacturing a semiconductor device using the same

Family Cites Families (46)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4116682A (en) * 1976-12-27 1978-09-26 Polk Donald E Amorphous metal alloys and products thereof
JP3225706B2 (ja) * 1993-08-25 2001-11-05 ソニー株式会社 半導体装置におけるバリアメタル層の形成方法
JPH11145077A (ja) * 1997-10-31 1999-05-28 Texas Instr Inc <Ti> 膜及びその製法
US6445023B1 (en) * 1999-03-16 2002-09-03 Micron Technology, Inc. Mixed metal nitride and boride barrier layers
US6627995B2 (en) * 2000-03-03 2003-09-30 Cvc Products, Inc. Microelectronic interconnect material with adhesion promotion layer and fabrication method
US6455421B1 (en) * 2000-07-31 2002-09-24 Applied Materials, Inc. Plasma treatment of tantalum nitride compound films formed by chemical vapor deposition
US6444263B1 (en) * 2000-09-15 2002-09-03 Cvc Products, Inc. Method of chemical-vapor deposition of a material
US6630201B2 (en) * 2001-04-05 2003-10-07 Angstron Systems, Inc. Adsorption process for atomic layer deposition
JP3963078B2 (ja) * 2000-12-25 2007-08-22 株式会社高純度化学研究所 ターシャリーアミルイミドトリス（ジメチルアミド）タンタルとその製造方法及びそれを用いたｍｏｃｖｄ用原料溶液並びにそれを用いた窒化タンタル膜の形成方法
US6861334B2 (en) * 2001-06-21 2005-03-01 Asm International, N.V. Method of fabricating trench isolation structures for integrated circuits using atomic layer deposition
US7098131B2 (en) * 2001-07-19 2006-08-29 Samsung Electronics Co., Ltd. Methods for forming atomic layers and thin films including tantalum nitride and devices including the same
KR100434697B1 (ko) * 2001-09-05 2004-06-07 주식회사 하이닉스반도체 반도체소자의 제조방법
KR100805843B1 (ko) * 2001-12-28 2008-02-21 에이에스엠지니텍코리아 주식회사 구리 배선 형성방법, 그에 따라 제조된 반도체 소자 및구리 배선 형성 시스템
JP3556206B2 (ja) * 2002-07-15 2004-08-18 沖電気工業株式会社 金属配線の形成方法
US20040036129A1 (en) * 2002-08-22 2004-02-26 Micron Technology, Inc. Atomic layer deposition of CMOS gates with variable work functions
JP2004095893A (ja) * 2002-08-30 2004-03-25 Nec Electronics Corp 半導体記憶装置及びその制御方法と製造方法
US6955986B2 (en) * 2003-03-27 2005-10-18 Asm International N.V. Atomic layer deposition methods for forming a multi-layer adhesion-barrier layer for integrated circuits
US7186446B2 (en) * 2003-10-31 2007-03-06 International Business Machines Corporation Plasma enhanced ALD of tantalum nitride and bilayer
US20050221021A1 (en) * 2004-03-31 2005-10-06 Tokyo Electron Limited Method and system for performing atomic layer deposition
US7453149B2 (en) * 2004-08-04 2008-11-18 Taiwan Semiconductor Manufacturing Co., Ltd. Composite barrier layer
US7300869B2 (en) * 2004-09-20 2007-11-27 Lsi Corporation Integrated barrier and seed layer for copper interconnect technology
US20060113675A1 (en) * 2004-12-01 2006-06-01 Chung-Liang Chang Barrier material and process for Cu interconnect
US7341959B2 (en) * 2005-03-21 2008-03-11 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US8486845B2 (en) * 2005-03-21 2013-07-16 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US8974868B2 (en) * 2005-03-21 2015-03-10 Tokyo Electron Limited Post deposition plasma cleaning system and method
US7314835B2 (en) * 2005-03-21 2008-01-01 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US20060210723A1 (en) * 2005-03-21 2006-09-21 Tokyo Electron Limited Plasma enhanced atomic layer deposition system and method
US7422636B2 (en) * 2005-03-25 2008-09-09 Tokyo Electron Limited Plasma enhanced atomic layer deposition system having reduced contamination
US20060213437A1 (en) * 2005-03-28 2006-09-28 Tokyo Electron Limited Plasma enhanced atomic layer deposition system
US20070059502A1 (en) * 2005-05-05 2007-03-15 Applied Materials, Inc. Integrated process for sputter deposition of a conductive barrier layer, especially an alloy of ruthenium and tantalum, underlying copper or copper alloy seed layer
US20060251872A1 (en) * 2005-05-05 2006-11-09 Wang Jenn Y Conductive barrier layer, especially an alloy of ruthenium and tantalum and sputter deposition thereof
DE102005023122A1 (de) * 2005-05-19 2006-11-23 Infineon Technologies Ag Integrierte Schaltungsanordnung mit Schichtstapel und Verfahren
US7550385B2 (en) * 2005-09-30 2009-06-23 Intel Corporation Amine-free deposition of metal-nitride films
CN100565930C (zh) * 2005-10-14 2009-12-02 株式会社东芝 非易失性半导体存储装置
US20070116888A1 (en) * 2005-11-18 2007-05-24 Tokyo Electron Limited Method and system for performing different deposition processes within a single chamber
US7897217B2 (en) * 2005-11-18 2011-03-01 Tokyo Electron Limited Method and system for performing plasma enhanced atomic layer deposition
US7727912B2 (en) * 2006-03-20 2010-06-01 Tokyo Electron Limited Method of light enhanced atomic layer deposition
US7645484B2 (en) * 2006-03-31 2010-01-12 Tokyo Electron Limited Method of forming a metal carbide or metal carbonitride film having improved adhesion
KR101422529B1 (ko) 2006-09-13 2014-07-24 엔쏜 인코포레이티드 전기적 전도성 중합체 및 귀금속/준귀금속으로 코팅된 물품 및 그 제조방법
US20080132050A1 (en) * 2006-12-05 2008-06-05 Lavoie Adrien R Deposition process for graded cobalt barrier layers
US20080141937A1 (en) * 2006-12-19 2008-06-19 Tokyo Electron Limited Method and system for controlling a vapor delivery system
EP1942528A1 (en) * 2007-01-04 2008-07-09 Interuniversitair Microelektronica Centrum Electronic device and process for manufacturing the same
JP2008205012A (ja) * 2007-02-16 2008-09-04 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
US7829158B2 (en) * 2007-05-07 2010-11-09 Tokyo Electron Limited Method for depositing a barrier layer on a low dielectric constant material
JP5513767B2 (ja) * 2008-06-25 2014-06-04 株式会社日立国際電気 半導体装置の製造方法、基板処理方法、基板処理装置および半導体装置
US8557702B2 (en) * 2009-02-02 2013-10-15 Asm America, Inc. Plasma-enhanced atomic layers deposition of conductive material over dielectric layers

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070059929A1 (en) * 2004-06-25 2007-03-15 Hag-Ju Cho Method of forming a tantalum carbon nitride layer and method of manufacturing a semiconductor device using the same

Also Published As

Publication number Publication date
KR101503969B1 (ko) 2015-03-24
US20100048009A1 (en) 2010-02-25
CN102132389B (zh) 2013-07-10
WO2010027715A1 (en) 2010-03-11
CN102132389A (zh) 2011-07-20
JP2012501093A (ja) 2012-01-12
DE112009002118T5 (de) 2011-07-28
KR20110069015A (ko) 2011-06-22
TW201021099A (en) 2010-06-01
JP5529134B2 (ja) 2014-06-25
US7985680B2 (en) 2011-07-26
TWI438832B (zh) 2014-05-21

Similar Documents

Publication Publication Date Title
DE112009002118B4 (de) Verfahren zum Formen von aluminiumdotierten Metall-Carbonitrid-Gate-Elektroden
KR102712252B1 (ko) 금속 카바이드 재료를 포함하는 구조물, 그 구조물을 포함하는 디바이스, 및 그의 형성 방법
KR102662958B1 (ko) 원자층 퇴적에 의한 기판 상의 전이 금속 질화물 막의 형성 방법 및 관련 반도체 소자 구조물들
JP6814018B2 (ja) ＮｂＭＣ層
DE10132882B4 (de) Verfahren zum Ausbilden einer Dünnschicht unter Verwendung einer Atomschichtabscheidung
DE112010001364B4 (de) Verfahren zum Ausbilden eines Gatestapels mit hohem k-Wert und reduzierter effektiver Oxiddicke
DE10049257B4 (de) Verfahren zur Dünnfilmerzeugung mittels atomarer Schichtdeposition
DE60019789T2 (de) Verfahren zum modifizieren von chemikalien in einem ald-verfahren
DE60211940T2 (de) Integration von stickstoff in einen dielektrischen film mit hohem k
CN113539810A (zh) 形成氮化铬层的方法及包括氮化铬层的结构
DE112005002160T5 (de) Dünnfilmkondensator und Verfahren zum Bilden desselben sowie computerlesbares Speichermedium
DE102006000615A1 (de) Materialien mit hoher Dielektrizitätskonstante
DE10392519T5 (de) System zur Abscheidung eines Films auf einem Substrat unter Verwendung eines Gas-Precursors mit niedrigem Dampfdruck
US20060131671A1 (en) Electronic device including dielectric layer, and a process for forming the electronic device
US10875774B2 (en) Tritertbutyl aluminum reactants for vapor deposition
DE102019116992A1 (de) Bildungs- und in-situ-ätzprozesse für metallschichten
DE102007042950A1 (de) Integrierte Schaltungsvorrichtung mit einer Gateelektrodenstruktur und ein entsprechendes Verfahren zur Herstellung
KR20250033047A (ko) 2차원 금속 디칼코게나이드 층을 포함하는 반도체 구조 형성 방법
KR20230012422A (ko) 전이 금속과 13족 원소를 포함한 층을 형성하기 위한 방법 및 시스템
DE102021104964A1 (de) Moleküllagenabscheidung von schichten aus amorphem kohlenstoff
TW202538087A (zh) 生長低電阻率含金屬膜之方法
WO2006063958A2 (de) Verfahren zur herstellung einer elektrode

Legal Events

Date Code Title Description
R012 Request for examination validly filed
R409 Internal rectification of the legal status completed
R016 Response to examination communication
R016 Response to examination communication
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0021337000

Ipc: H01L0021336000

R018 Grant decision by examination section/examining division
R079 Amendment of ipc main class

Free format text: PREVIOUS MAIN CLASS: H01L0021337000

Ipc: H01L0021336000

Effective date: 20121220

R082 Change of representative

Representative=s name: BOEHMERT & BOEHMERT, DE

Representative=s name: BOEHMERT & BOEHMERT ANWALTSPARTNERSCHAFT MBB -, DE

R020 Patent grant now final

Effective date: 20130608

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee