DE102015210603B4 - Verfahren zur Herstellung einer Halbleitervorrichtung - Google Patents

Verfahren zur Herstellung einer Halbleitervorrichtung Download PDF

Info

Publication number
DE102015210603B4
DE102015210603B4 DE102015210603.9A DE102015210603A DE102015210603B4 DE 102015210603 B4 DE102015210603 B4 DE 102015210603B4 DE 102015210603 A DE102015210603 A DE 102015210603A DE 102015210603 B4 DE102015210603 B4 DE 102015210603B4
Authority
DE
Germany
Prior art keywords
cylindrical electrode
cavity
substrate
cylindrical
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE102015210603.9A
Other languages
German (de)
English (en)
Other versions
DE102015210603A1 (de
Inventor
Naoki Yoshimatsu
Kiyohiro Uchida
Taketoshi Shikano
Masayoshi Shinkai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE102015210603A1 publication Critical patent/DE102015210603A1/de
Application granted granted Critical
Publication of DE102015210603B4 publication Critical patent/DE102015210603B4/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07 e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49175Parallel arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49861Lead-frames fixed on or encapsulated in insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
DE102015210603.9A 2014-06-27 2015-06-10 Verfahren zur Herstellung einer Halbleitervorrichtung Active DE102015210603B4 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2014-132430 2014-06-27
JP2014132430A JP6249892B2 (ja) 2014-06-27 2014-06-27 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE102015210603A1 DE102015210603A1 (de) 2015-12-31
DE102015210603B4 true DE102015210603B4 (de) 2019-05-23

Family

ID=54839996

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102015210603.9A Active DE102015210603B4 (de) 2014-06-27 2015-06-10 Verfahren zur Herstellung einer Halbleitervorrichtung

Country Status (4)

Country Link
US (1) US9437460B2 (enExample)
JP (1) JP6249892B2 (enExample)
CN (1) CN105225971B (enExample)
DE (1) DE102015210603B4 (enExample)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108028479B (zh) * 2016-03-18 2020-02-11 富士电机株式会社 半导体装置、金属电极部件及半导体装置的制造方法
US10347549B2 (en) * 2016-04-30 2019-07-09 Littelfuse, Inc. Power semiconductor device module having mechanical corner press-fit anchors
US10062621B2 (en) * 2016-04-30 2018-08-28 Ixys, Llc Power semiconductor device module having mechanical corner press-fit anchors
CN109417068B (zh) * 2017-01-17 2022-05-06 富士电机株式会社 半导体装置
US11244836B2 (en) * 2017-06-21 2022-02-08 Mitsubishi Electric Corporation Semiconductor apparatus, power conversion device, and method for manufacturing semiconductor apparatus
CN107946273A (zh) * 2017-12-22 2018-04-20 江苏宏微科技股份有限公司 一种插接功率模块封装装置
JP7107120B2 (ja) * 2018-09-14 2022-07-27 富士電機株式会社 半導体装置、半導体装置の製造方法
JP7279354B2 (ja) * 2018-12-17 2023-05-23 富士電機株式会社 半導体素子及び半導体素子の識別方法
JP7293936B2 (ja) 2019-07-19 2023-06-20 富士電機株式会社 半導体装置及び半導体装置の製造方法
JP7404834B2 (ja) * 2019-12-06 2023-12-26 富士電機株式会社 半導体装置及び半導体装置の製造方法
CN111769090A (zh) * 2020-07-21 2020-10-13 无锡利普思半导体有限公司 塑封功率模块、塑封模具及塑封方法
JP7666045B2 (ja) * 2021-03-19 2025-04-22 富士電機株式会社 半導体装置
JP7692720B2 (ja) * 2021-04-06 2025-06-16 三菱重工業株式会社 パワーモジュール、及びパワーモジュールの製造方法
JP7484800B2 (ja) * 2021-04-08 2024-05-16 三菱電機株式会社 半導体装置および半導体装置の製造方法
US11901273B2 (en) * 2021-07-26 2024-02-13 Infineon Technologies Ag Power module with press-fit contacts
US12494418B2 (en) * 2021-07-26 2025-12-09 Infineon Technologies Ag Power module with press-fit contacts
DE102021121797A1 (de) * 2021-08-23 2023-02-23 Infineon Technologies Ag Leistungshalbleitermodul mit buchse oder einpresspin und verfahren zu seiner herstellung
US12438068B2 (en) 2022-01-18 2025-10-07 Infineon Technologies Austria Ag Stacked module arrangement
US20240170378A1 (en) * 2022-11-17 2024-05-23 Semiconductor Components Industries, Llc Power module package with molded via and dual side press-fit pin
CN120239903A (zh) * 2022-11-25 2025-07-01 华为数字能源技术有限公司 模具成型功率模块
DE102024202665A1 (de) * 2024-03-20 2025-09-25 Volkswagen Aktiengesellschaft Verfahren zur Herstellung einer leistungselektronischen Einrichtung, leistungselektronische Einrichtung und Kraftfahrzeug

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010129818A (ja) 2008-11-28 2010-06-10 Mitsubishi Electric Corp 半導体装置の製造方法および半導体装置
JP2010186953A (ja) 2009-02-13 2010-08-26 Mitsubishi Electric Corp 電力用半導体装置とその製造方法
JP2011187819A (ja) 2010-03-10 2011-09-22 Mitsubishi Electric Corp 樹脂封止型パワーモジュールおよびその製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5118027A (en) * 1991-04-24 1992-06-02 International Business Machines Corporation Method of aligning and mounting solder balls to a substrate
JP4626098B2 (ja) * 2001-06-15 2011-02-02 イビデン株式会社 プリント配線板の製造方法
JP5358077B2 (ja) * 2007-09-28 2013-12-04 スパンション エルエルシー 半導体装置及びその製造方法
DE102008005547B4 (de) * 2008-01-23 2013-08-29 Infineon Technologies Ag Leistungshalbleitermodul und Schaltungsanordnung mit einem Leistungshalbleitermodul
DE102008029829B4 (de) * 2008-06-25 2012-10-11 Danfoss Silicon Power Gmbh Vertikal nach oben kontaktierender Halbleiter und Verfahren zu dessen Herstellung
JP5101467B2 (ja) * 2008-11-26 2012-12-19 三菱電機株式会社 電力用半導体モジュール
JP5245880B2 (ja) * 2009-02-04 2013-07-24 三菱電機株式会社 電力用半導体モジュールとその製造方法
JP5268786B2 (ja) * 2009-06-04 2013-08-21 三菱電機株式会社 半導体モジュール
US20120261689A1 (en) * 2011-04-13 2012-10-18 Bernd Karl Appelt Semiconductor device packages and related methods
CN103824821B (zh) * 2014-03-11 2016-04-06 湖南进芯电子科技有限公司 一种塑料密闭封装的开关电源模块及其制备方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010129818A (ja) 2008-11-28 2010-06-10 Mitsubishi Electric Corp 半導体装置の製造方法および半導体装置
JP2010186953A (ja) 2009-02-13 2010-08-26 Mitsubishi Electric Corp 電力用半導体装置とその製造方法
JP2011187819A (ja) 2010-03-10 2011-09-22 Mitsubishi Electric Corp 樹脂封止型パワーモジュールおよびその製造方法

Also Published As

Publication number Publication date
US20150380274A1 (en) 2015-12-31
US9437460B2 (en) 2016-09-06
CN105225971A (zh) 2016-01-06
CN105225971B (zh) 2018-12-04
JP6249892B2 (ja) 2017-12-20
DE102015210603A1 (de) 2015-12-31
JP2016012604A (ja) 2016-01-21

Similar Documents

Publication Publication Date Title
DE102015210603B4 (de) Verfahren zur Herstellung einer Halbleitervorrichtung
DE112012005920B4 (de) Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung
DE69735361T2 (de) Harzverkapselte halbleiteranordnung und herstellungsverfahren dafür
DE102006047989B4 (de) Leistungshalbleitervorrichtung und Verfahren zu deren Herstellung
DE102016110235B4 (de) Halbleitervorrichtungen mit Clipvorrichtung und Verfahren zum Fertigen einer Halbleitervorrichtung
DE112014007140B4 (de) Leistungshalbleiteranordnung und Verfahren zum Herstellen derselben
DE102009042399B4 (de) Leistungshalbleitervorrichtung und Herstellungsverfahren dafür
DE102014118836B4 (de) Halbleiter-packaging-anordnung und halbleiter-package
DE102011082781B4 (de) Halbleitervorrichtung mit einer plattenelektrode zum verbinden einer mehrzahl an halbleiterchips
DE1564354A1 (de) Metallteil fuer Halbleiter-Bauelemente
DE102015103897B4 (de) Leitungsrahmen mit Kühlerplatte, Verfahren zur Herstellung eines Leitungsrahmens mit Kühlerplatte, Halbleitervorrichtung und Verfahren zur Herstellung einer Halbleitervorrichtung
DE112013007426B4 (de) Halbleitervorrichtung und Herstellungsverfahren dafür
DE112014006653B4 (de) Verfahren zum Herstellen einer Halbleiteranordnung
DE10221891A1 (de) Halbleitervorrichtung
DE10129388A1 (de) Elektronisches Bauteil und Verfahren zu seiner Herstellung
DE102017205116B4 (de) Halbleitervorrichtung und Fertigungsverfahren derselben
DE102013020973A1 (de) Ein QFN mit benetzbarer Flanke
DE102017203361A1 (de) Verfahren zum herstellen eines formprodukts und formprodukt
DE102014223863B4 (de) Leistungshalbleitereinrichtungen
DE112017005093T5 (de) Verfahren zum Herstellen einer wärmeableitenden Einheit
DE102020125705A1 (de) Leistungs-Halbleitervorrichtung
DE102014218389B4 (de) Halbleitermodul
DE102017212186B4 (de) Mit Gießharz versiegelte Leistungshalbleiter-Einrichtung
DE102013103351B4 (de) Elektronikmodul
DE102020109703A1 (de) Halbleitergehäuse und verfahren zu seiner herstellung

Legal Events

Date Code Title Description
R012 Request for examination validly filed
R084 Declaration of willingness to licence
R016 Response to examination communication
R018 Grant decision by examination section/examining division
R020 Patent grant now final