DE102004024893A1 - Vorrichtung und Verfahren zum Ätzen eines Wafer-Rands - Google Patents

Vorrichtung und Verfahren zum Ätzen eines Wafer-Rands Download PDF

Info

Publication number
DE102004024893A1
DE102004024893A1 DE102004024893A DE102004024893A DE102004024893A1 DE 102004024893 A1 DE102004024893 A1 DE 102004024893A1 DE 102004024893 A DE102004024893 A DE 102004024893A DE 102004024893 A DE102004024893 A DE 102004024893A DE 102004024893 A1 DE102004024893 A1 DE 102004024893A1
Authority
DE
Germany
Prior art keywords
semiconductor wafer
electrode
etching
gap
wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE102004024893A
Other languages
German (de)
English (en)
Inventor
Chang-Won Choi
Tae-Ryong Kim
Jong-Baum Kim
Jung-woo Suwon Seo
Chang-Ju Byun
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from KR1020030033844A external-priority patent/KR100585089B1/ko
Priority claimed from KR1020030070634A external-priority patent/KR100604826B1/ko
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of DE102004024893A1 publication Critical patent/DE102004024893A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H01J37/32541—Shape

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
  • Weting (AREA)
DE102004024893A 2003-05-27 2004-05-19 Vorrichtung und Verfahren zum Ätzen eines Wafer-Rands Ceased DE102004024893A1 (de)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
KR1020030033844A KR100585089B1 (ko) 2003-05-27 2003-05-27 웨이퍼 가장자리를 처리하기 위한 플라즈마 처리장치,플라즈마 처리장치용 절연판, 플라즈마 처리장치용하부전극, 웨이퍼 가장자리의 플라즈마 처리방법 및반도체소자의 제조방법
KR03/33844 2003-05-27
KR03/70634 2003-10-10
KR1020030070634A KR100604826B1 (ko) 2003-10-10 2003-10-10 웨이퍼 가장자리를 처리하기 위한 플라즈마 처리장치 및그 플라즈마 처리방법
US10/762,526 US20040238488A1 (en) 2003-05-27 2004-01-23 Wafer edge etching apparatus and method
US10/762526 2004-01-23

Publications (1)

Publication Number Publication Date
DE102004024893A1 true DE102004024893A1 (de) 2005-04-14

Family

ID=34108610

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102004024893A Ceased DE102004024893A1 (de) 2003-05-27 2004-05-19 Vorrichtung und Verfahren zum Ätzen eines Wafer-Rands

Country Status (4)

Country Link
JP (1) JP2005005701A (https=)
CN (1) CN1595618A (https=)
DE (1) DE102004024893A1 (https=)
TW (1) TWI281713B (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1750294A1 (en) * 2005-08-04 2007-02-07 Jusung Engineering Co. Ltd. Plasma etching apparatus

Families Citing this family (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8083890B2 (en) * 2005-09-27 2011-12-27 Lam Research Corporation Gas modulation to control edge exclusion in a bevel edge etching plasma chamber
US20070068623A1 (en) * 2005-09-27 2007-03-29 Yunsang Kim Apparatus for the removal of a set of byproducts from a substrate edge and methods therefor
US7909960B2 (en) 2005-09-27 2011-03-22 Lam Research Corporation Apparatus and methods to remove films on bevel edge and backside of wafer
US8398778B2 (en) 2007-01-26 2013-03-19 Lam Research Corporation Control of bevel etch film profile using plasma exclusion zone rings larger than the wafer diameter
US8580078B2 (en) * 2007-01-26 2013-11-12 Lam Research Corporation Bevel etcher with vacuum chuck
US8137501B2 (en) * 2007-02-08 2012-03-20 Lam Research Corporation Bevel clean device
WO2009124060A1 (en) 2008-03-31 2009-10-08 Memc Electronic Materials, Inc. Methods for etching the edge of a silicon wafer
EP2359390A1 (en) 2008-11-19 2011-08-24 MEMC Electronic Materials, Inc. Method and system for stripping the edge of a semiconductor wafer
CN101930480B (zh) * 2009-06-19 2012-03-07 中芯国际集成电路制造(上海)有限公司 优化cmos图像传感器版图的方法
US8853054B2 (en) 2012-03-06 2014-10-07 Sunedison Semiconductor Limited Method of manufacturing silicon-on-insulator wafers
CN103715049B (zh) * 2012-09-29 2016-05-04 中微半导体设备(上海)有限公司 等离子体处理装置及调节基片边缘区域制程速率的方法
JP6348321B2 (ja) * 2013-05-17 2018-06-27 キヤノンアネルバ株式会社 エッチング装置
KR102116474B1 (ko) 2020-02-04 2020-05-28 피에스케이 주식회사 기판 처리 장치 및 기판 처리 방법
JP2022143889A (ja) 2021-03-18 2022-10-03 キオクシア株式会社 半導体製造装置及び半導体装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1750294A1 (en) * 2005-08-04 2007-02-07 Jusung Engineering Co. Ltd. Plasma etching apparatus
US7951261B2 (en) 2005-08-04 2011-05-31 Jusung Engineering Co. Ltd. Plasma etching apparatus

Also Published As

Publication number Publication date
TWI281713B (en) 2007-05-21
JP2005005701A (ja) 2005-01-06
TW200501256A (en) 2005-01-01
CN1595618A (zh) 2005-03-16

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OP8 Request for examination as to paragraph 44 patent law
8131 Rejection