CN1870430B - 占空比校正器及校正占空比的方法 - Google Patents
占空比校正器及校正占空比的方法 Download PDFInfo
- Publication number
- CN1870430B CN1870430B CN2006100673581A CN200610067358A CN1870430B CN 1870430 B CN1870430 B CN 1870430B CN 2006100673581 A CN2006100673581 A CN 2006100673581A CN 200610067358 A CN200610067358 A CN 200610067358A CN 1870430 B CN1870430 B CN 1870430B
- Authority
- CN
- China
- Prior art keywords
- clock signal
- delay
- pulse
- signal
- inversion
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000000034 method Methods 0.000 title claims description 10
- 230000007704 transition Effects 0.000 claims abstract description 5
- 230000009466 transformation Effects 0.000 claims description 31
- 230000000630 rising effect Effects 0.000 claims description 26
- 230000003111 delayed effect Effects 0.000 claims description 7
- 230000005540 biological transmission Effects 0.000 claims 1
- 238000011084 recovery Methods 0.000 claims 1
- 238000004891 communication Methods 0.000 description 40
- 206010027336 Menstruation delayed Diseases 0.000 description 34
- 239000003990 capacitor Substances 0.000 description 30
- 101000885321 Homo sapiens Serine/threonine-protein kinase DCLK1 Proteins 0.000 description 28
- 102100039758 Serine/threonine-protein kinase DCLK1 Human genes 0.000 description 28
- 101000795074 Homo sapiens Tryptase alpha/beta-1 Proteins 0.000 description 11
- 102100029639 Tryptase alpha/beta-1 Human genes 0.000 description 11
- 101000662819 Physarum polycephalum Terpene synthase 1 Proteins 0.000 description 7
- 230000008676 import Effects 0.000 description 5
- 230000004044 response Effects 0.000 description 5
- 101000830822 Physarum polycephalum Terpene synthase 2 Proteins 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- 230000006870 function Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 230000001360 synchronised effect Effects 0.000 description 3
- 238000012937 correction Methods 0.000 description 2
- 230000000306 recurrent effect Effects 0.000 description 2
- 238000006467 substitution reaction Methods 0.000 description 2
- 101710194099 Thiamine-phosphate synthase 2 Proteins 0.000 description 1
- 230000004913 activation Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 230000001934 delay Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 238000012546 transfer Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/156—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern
- H03K5/1565—Arrangements in which a continuous pulse train is transformed into a train having a desired pattern the output pulses having a constant duty cycle
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Pulse Circuits (AREA)
- Dram (AREA)
Abstract
Description
Claims (14)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US11/048185 | 2005-02-01 | ||
US11/048,185 US7221204B2 (en) | 2005-02-01 | 2005-02-01 | Duty cycle corrector |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1870430A CN1870430A (zh) | 2006-11-29 |
CN1870430B true CN1870430B (zh) | 2010-05-12 |
Family
ID=36709885
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN2006100673581A Expired - Fee Related CN1870430B (zh) | 2005-02-01 | 2006-01-28 | 占空比校正器及校正占空比的方法 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7221204B2 (zh) |
CN (1) | CN1870430B (zh) |
DE (1) | DE102006002473B4 (zh) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100701704B1 (ko) * | 2006-01-12 | 2007-03-29 | 주식회사 하이닉스반도체 | 듀티 교정 회로 |
KR100829453B1 (ko) * | 2006-08-11 | 2008-05-15 | 주식회사 하이닉스반도체 | Dll 회로의 기준 클럭 생성 장치 및 방법 |
JP2008160610A (ja) * | 2006-12-26 | 2008-07-10 | Nec Electronics Corp | クロックデューティ変更回路 |
CN101227184B (zh) * | 2008-02-19 | 2011-06-22 | 东南大学 | 高速占空比校准电路 |
KR100942977B1 (ko) * | 2008-05-19 | 2010-02-17 | 주식회사 하이닉스반도체 | 듀티비 보정회로 |
CN101645702B (zh) * | 2009-08-03 | 2011-11-02 | 四川和芯微电子股份有限公司 | 占空比调节方法和电路 |
CN105261389B (zh) * | 2015-11-16 | 2019-05-17 | 西安紫光国芯半导体有限公司 | 提高输入时钟占空比免疫力的方法、电路及dram存储器 |
CN112383290B (zh) * | 2020-11-26 | 2023-10-13 | 海光信息技术股份有限公司 | 时钟占空比校准电路及方法、正交相位校准电路及方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5475322A (en) * | 1993-10-12 | 1995-12-12 | Wang Laboratories, Inc. | Clock frequency multiplying and squaring circuit and method |
CN1412947A (zh) * | 2002-10-30 | 2003-04-23 | 威盛电子股份有限公司 | 可调整工作周期的缓冲器及其操作方法 |
CN1507156A (zh) * | 2002-12-06 | 2004-06-23 | ���µ�����ҵ��ʽ���� | 占空比校正电路 |
Family Cites Families (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9308944D0 (en) * | 1993-04-30 | 1993-06-16 | Inmos Ltd | Ring oscillator |
JP3754070B2 (ja) | 1994-02-15 | 2006-03-08 | ラムバス・インコーポレーテッド | 遅延ロック・ループ |
US5945857A (en) | 1998-02-13 | 1999-08-31 | Lucent Technologies, Inc. | Method and apparatus for duty-cycle correction |
KR100366618B1 (ko) | 2000-03-31 | 2003-01-09 | 삼성전자 주식회사 | 클럭 신호의 듀티 사이클을 보정하는 지연 동기 루프 회로및 지연 동기 방법 |
US6424178B1 (en) | 2000-08-30 | 2002-07-23 | Micron Technology, Inc. | Method and system for controlling the duty cycle of a clock signal |
US20030052719A1 (en) * | 2001-09-20 | 2003-03-20 | Na Kwang Jin | Digital delay line and delay locked loop using the digital delay line |
KR100424180B1 (ko) * | 2001-12-21 | 2004-03-24 | 주식회사 하이닉스반도체 | 듀티 사이클 보상 기능을 갖는 지연 고정 루프 회로 |
KR100486256B1 (ko) * | 2002-09-04 | 2005-05-03 | 삼성전자주식회사 | 듀티사이클 보정회로를 구비하는 반도체 메모리 장치 및상기 반도체 메모리 장치에서 클럭신호를 보간하는 회로 |
US6967514B2 (en) | 2002-10-21 | 2005-11-22 | Rambus, Inc. | Method and apparatus for digital duty cycle adjustment |
KR100560660B1 (ko) | 2003-03-28 | 2006-03-16 | 삼성전자주식회사 | 듀티 사이클 보정을 위한 장치 및 방법 |
DE10320794B3 (de) * | 2003-04-30 | 2004-11-04 | Infineon Technologies Ag | Vorrichtung und Verfahren zur Korrektur des Tastverhältnisses eines Taktsignals |
US7187221B2 (en) * | 2004-06-30 | 2007-03-06 | Infineon Technologies Ag | Digital duty cycle corrector |
-
2005
- 2005-02-01 US US11/048,185 patent/US7221204B2/en not_active Expired - Fee Related
-
2006
- 2006-01-18 DE DE102006002473A patent/DE102006002473B4/de not_active Expired - Fee Related
- 2006-01-28 CN CN2006100673581A patent/CN1870430B/zh not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5475322A (en) * | 1993-10-12 | 1995-12-12 | Wang Laboratories, Inc. | Clock frequency multiplying and squaring circuit and method |
CN1412947A (zh) * | 2002-10-30 | 2003-04-23 | 威盛电子股份有限公司 | 可调整工作周期的缓冲器及其操作方法 |
CN1507156A (zh) * | 2002-12-06 | 2004-06-23 | ���µ�����ҵ��ʽ���� | 占空比校正电路 |
Non-Patent Citations (1)
Title |
---|
全文. |
Also Published As
Publication number | Publication date |
---|---|
CN1870430A (zh) | 2006-11-29 |
US20060170474A1 (en) | 2006-08-03 |
DE102006002473A1 (de) | 2006-08-10 |
US7221204B2 (en) | 2007-05-22 |
DE102006002473B4 (de) | 2011-02-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN1870430B (zh) | 占空比校正器及校正占空比的方法 | |
CN1941633B (zh) | 延迟锁定回路 | |
CN104426503B (zh) | 相位混合电路、以及包括相位混合电路的半导体装置和半导体系统 | |
US8384448B2 (en) | DLL circuit and method of controlling the same | |
CN102361456B (zh) | 一种时钟相位对齐调整电路 | |
CN1147997C (zh) | 脉冲发生电路 | |
CN101814906B (zh) | 工作时间校正电路 | |
KR20030025181A (ko) | 반도체 집적 회로 장치 및 지연 로크 루프 장치 | |
US7230465B2 (en) | Duty cycle corrector | |
CN104639157B (zh) | 定时调整电路和半导体集成电路装置 | |
CN101017704A (zh) | 用于在半导体存储装置中输出数据的电路与方法 | |
US6247033B1 (en) | Random signal generator | |
CN103795375B (zh) | 占空比调整电路及其方法 | |
GB2408641A (en) | A pulse generator providing short clock-derived activation pulses for a pulsed latch | |
CN100440371C (zh) | 延迟锁定回路及使用其闭锁时钟延迟的方法 | |
US20010035780A1 (en) | Clock period sensing circuit | |
CN206259851U (zh) | 用于控制电荷泵电路的装置 | |
US7990197B2 (en) | Internal clock driver circuit | |
CN111213207B (zh) | 提供多相时钟信号的设备及方法 | |
US8810296B2 (en) | D flip-flop with high-swing output | |
CN112787634B (zh) | 校正时钟占空比的电路及其校正控制方法和装置 | |
US20070165476A1 (en) | Clock signal generating circuit | |
US20080012597A1 (en) | Method for controlling the evaluation time of a state machine | |
CN1909112B (zh) | 升压电路以及具有升压电路的半导体装置 | |
CN108475081B (zh) | 高差分电压下的脉冲锁存器复位跟踪 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
C56 | Change in the name or address of the patentee | ||
CP01 | Change in the name or title of a patent holder |
Address after: Munich, Germany Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: Infineon Technologies AG |
|
TR01 | Transfer of patent right |
Effective date of registration: 20120917 Address after: Munich, Germany Patentee after: QIMONDA AG Address before: Munich, Germany Patentee before: Infineon Technologies AG |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20151225 Address after: German Berg, Laura Ibiza Patentee after: Infineon Technologies AG Address before: Munich, Germany Patentee before: QIMONDA AG |
|
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20100512 Termination date: 20160128 |
|
EXPY | Termination of patent right or utility model |