CN1535479A - 封装的管芯封装件上的直接增加层 - Google Patents

封装的管芯封装件上的直接增加层 Download PDF

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CN1535479A
CN1535479A CNA018173942A CN01817394A CN1535479A CN 1535479 A CN1535479 A CN 1535479A CN A018173942 A CNA018173942 A CN A018173942A CN 01817394 A CN01817394 A CN 01817394A CN 1535479 A CN1535479 A CN 1535479A
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microelectronic core
microelectronic
active surface
encapsulating material
conductive traces
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CN100426492C (zh
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X��-C����
X·-C·穆
��Ī������
Q·马
H·福吉莫托
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Intel Corp
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Intel Corp
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    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated

Abstract

一微电子封装件，包括具有有效表面的微电子管芯和至少一个侧面。封装材料邻近微电子管芯侧设置，其中，封装材料包含至少一个基本与微电子管芯有效表面相平的表面。第一介电材料层可以设在微电子管芯有效表面和封装材料表面的至少一部分上。然后在第一介电材料层上设有至少一个导电轨迹。导电轨迹与微电子管芯有效表面电接触。至少一个导电轨迹邻近微电子管芯有效表面和封装材料表面伸展。

Description

封装的管芯封装件上的直接增加层
技术领域
本发明涉及用于封装微电子管芯的设备和过程。尤其是，本发明涉及一种封装技术，其可在封装的微电子管芯和覆盖微电子管芯的封装材料上制造增加层。
背景技术
计算机工业的当前目标是更高性能、更低成本、更小型化的集成电路元件和更大封装密度的集成电路。随着实现这些目的，微电子管芯变得更小。当然，更大封装密度的目标要求这个微电子管芯封装件等于微电子管芯自身的大小或只比它稍大(约10％到30％)。这种微电子管芯封装称为“芯片尺寸封装”或“CSP”。
如图8所示，真正的CSP包括直接在微电子管芯202的有效表面204上制造增加层。增加层可包含直接设在微电子管芯有效表面204上的介电层206。导电轨迹208可以形成在介电层206上，其中，每个导电轨迹208的一部分与微电子管芯有效表面204上的至少一个触点212接触。可以制造用于与外部元件(未示出)接触的诸如焊球或导电引线的外部触点，与至少一个导电轨迹208电接触。图8说明了由介电层206上的焊接掩模材料216围绕的作为焊球214的外部触点。然而，在这种真正的CSP中，由微电子管芯有效表面204所提供的表面面积通常没有为接触某些类型微电子管芯(即，逻辑电路)的外部元件(未示出)所需的所有外部触点提供足够的表面。
可以用内插器，诸如基板(主要是刚硬材料)或挠曲组件(主要是柔软材料)提供附加的表面面积。图9说明了基板内插器222，它具有通过小焊球228附着于基板内插器222的第一表面226且与之电接触的微电子管芯224。小焊球228在微电子管芯224上的触点232和基板内插器第一表面226上的导电轨迹234之间延伸。导电轨迹234经通路242与基板内插器222的第二表面238上的焊盘236分立地电接触，通路242伸过基板内插器222。外部触点244(显示为焊球)形成在焊盘236上。利用外部触点244实现微电子管芯224和外部电气系统(未示出)之间的电连通。
使用基板内插器222要求多个处理步骤。这些处理步骤增加了封装的成本。另外，即使使用小焊球228也会出现许多问题，可导致小焊球228之间短路，并难以在微电子管芯224和基板内插器222之间嵌入用来防止污染和提供机械稳定性的底层填料。
图10说明了挠曲元件内插器252，其中，微电子管芯256的有效表面254用一层粘接剂262附着到挠曲元件内插器252的第一表面258上。微电子管芯256封装在封装材料264中。用激光打孔通过挠曲元件内插器252到达微电子管芯有效表面254上的触点266以及挠曲元件内插器252内所选的金属焊盘268，在挠曲组件内插器252中形成开口。在挠曲组件内插器252的第二表面272上和开口中形成导电材料层。用标准光掩模/腐蚀过程图形化导电材料层，以便形成导电通路274和导电轨迹276。在导电轨迹276(显示为导电轨迹276附近的焊接掩模材料282所围绕的焊球278)上形成外部触点。
使用挠曲元件内插器252形成挠曲元件内插器252的粘结材料层，还需要把挠曲元件内插器252粘结到微电子管芯256上。这些粘结过程相对困难，增加了封装的成本。此外，发现得到的封装可靠性差。
因而，要开发新的设备和技术用来提供附加的表面面积，以便形成在CSP应用中使用的轨迹，同时可应用商业上可利用的广泛地进行应用的半导体制造技术。
附图说明
本说明由权利要求书概括，权利要求书尤其指出和明确要求本发明的有关权利，但结合附图阅读本发明的以下描述，更容易确定本发明的优点：
图1a-1j是根据本发明形成微电子封装件的过程的第一实施例的侧视截面图；
图2a-2d是根据本发明形成包括散热装置的微电子封装件的过程的另一实施例的侧视截面图；
图3a-3f是根据本发明的管芯对准、附着和模制微电子封装件的方法的侧视截面图；
图4a-4e是根据本发明的管芯对准、附着和模制微电子封装件的另一方法的侧视截面图；
图5a-5f是根据本发明的管芯对准、附着和模制微电子封装件的又一方法的侧视截面图；
图6a-6e是根据本发明的管芯对准、附着和模制微电子封装件的替换方法的侧视截面图；
图7a-7e是根据本发明的管芯对准、附着和模制微电子封装件的又一替换方法的侧视截面图；
图8是现有技术已知的微电子装置的实际的CSP的截面图；
图9是现有技术已知的利用基板内插器的微电子装置的CSP的截面图；和
图10是现有技术已知的利用挠曲元件内插器的微电子装置的CSP的截面图。
具体实施方式
虽然图1a-1j、2a-2d、3a-3f、4a-4e、5a-5f、6a-6e和7a-7e说明了本发明的多个视图，但是这些图不是准确详细地描绘微电子组件。这些图以更清晰实行本发明原理的方式说明了半导体组件。另外，这些图中共同的部件用相同的标号来表示。
本发明涉及一种封装技术，在封装的微电子管芯和覆盖微电子管芯的封装材料上制造增加层。例举的微电子封装件包含微电子管芯，微电子管芯有有效表面和至少一个侧面。与微电子管芯侧面相邻设置封装材料，其中，封装材料包含至少一个基本与微电子管芯有效表面相平的表面。第一介电材料层可以设在微电子管芯有效表面和封装材料表面的至少一部分上。然后在第一介电材料层上设置至少一个导电轨迹。导电轨迹与微电子管芯有效表面电接触。至少一个导电轨迹邻近微电子管芯有效表面和邻近封装材料表面伸展。
图1a-1j说明了形成本发明的微电子封装件的过程的第一实施例。如图1a所示，保护膜104与微电子管芯102的有效表面106相接以便保护微电子管芯有效表面106不受污染。微电子管芯有效表面106上设有至少一个触点108。触点108与微电子管芯102内的集成电路(未示出)电接触。保护膜104最好是聚酰亚胺材料，可以有诸如硅酮等弱粘接剂，它附着到微电子管芯有效表面106上。可以在把微电子管芯102放在用于封装过程的模具或其它这种设备中之前应用该粘接型膜。保护膜104也可以是非粘接膜，诸如ETFE(乙烯-四氟乙烯)或Teflon膜，它在封装过程期间由模具或其它这种设备的内表面保持在微电子管芯有效表面106上。
然后，用如图1b所示覆盖微电子管芯102的后表面114和侧面116的封装材料112，诸如塑料、树脂、环氧树脂等封装微电子管芯102。可以用任何已知过程来实现微电子管芯102的封装，包含传送和压缩模制和分散，但不限于此。封装材料112提供机械刚性，保护微电子管芯102不受污染，提供用于形成轨迹层的表面面积。
封装之后，去除保护膜104，如图1c所示，暴露微电子管芯有效表面106。也如图1c所示，封装材料112最好模制为形成至少一个表面110，表面110基本对微电子管芯有效表面106相平。在进一步的制造步骤中利用封装材料表面110作为用于形成增加层(诸如介电材料层和导电轨迹)的附加的表面面积。
在微电子管芯有效表面106、触点108和封装材料表面110上设置第一介电层118，诸如环氧树脂、聚酰亚胺、二苯并环丁烯等，如图1d所示。本发明的介电层最好用可从Ibiden U.S.A.Corp.，SantaClara，California，U.S.A.和Avjinomoto U.S.A.，Inc.，Paramus，New Jersey，U.S.A.获得的环氧树脂来填充。第一介电层118的形成可以通过任何已知过程来实现，包含膜层叠、旋涂、辊涂(roll-coating)和喷射淀积等，但不限于这些。
如图1e所示，然后通过第一介电层118形成多个通路122。可以用现有技术中任何的已知方法形成多个通路122，包含但不限于以下方法：激光打孔、光刻，如果第一介电层118是光敏的，就用与现有技术中已知的光刻过程中制造光刻胶掩模相同的方式形成多个通路122。
在第一介电层118上形成多个导电轨迹124，如图1f所示，其中，每个导电轨迹124的一部分伸入所示多个通路122的至少一个中，与触点108电接触。多个导电轨迹124可以由任何一种可用的导电材料制成，诸如铜、铝及其合金。如图1f所示，至少一个导电轨迹邻近微电子管芯有效表面106和邻近封装材料表面110伸展。
可以用任何已知技术形成多个导电轨迹124，包含半添加镀覆和光刻技术，但不限于这些。例举的半添加镀覆技术可以包括淀积籽层，诸如第一介电层118上的溅射淀积或无电淀积金属。然后在诸如钛/铜合金的籽层上图形化抗蚀层，之后在图形化的抗蚀层中开口区域所暴露的籽层上电解电镀诸如铜的一层金属。剥离图形化的抗蚀层，腐蚀掉其上未镀有金属层的籽层的部分。对本领域的技术人员，显然有其它方法形成多个导电轨迹124。
如图1g所示，第二介电层126设置在多个导电轨迹124和第一介电层118上。第二介电层126的形成可以由任何已知过程来实现，包含膜层叠、辊涂和喷射淀积，但不限于这些。
如图1h所示，然后通过第二介电层126形成多个第二通路128。可以用现有技术的任何已知方法形成多个第二通路128，包含但不限于以下方法：激光打孔，如果第二介电层126是光敏的，就用与现有技术中已知的光刻过程中制成光刻胶掩模相同的方式形成多个第二通路128。
如果多个导电轨迹124不能把多个第二通路128放在适当的位置，那么，就在多个第二通路128中和第二介电层126上形成其它部分的导电轨迹，在其上形成另一介电层，在该介电层上形成另外多个通路，如图1f-1h所述。可以重复形成介电层和形成导电轨迹直到在适当位置形成通路。这样，一个导电轨迹的各部分可以由其多个部分形成并可位于不同的介电层上。
可以形成第二多个导电轨迹132，其中，每个第二多个导电轨迹132的一部分伸入多个第二通路128的至少一个中。第二多个导电轨迹132均包含连接焊盘134(用虚线140分界的轨迹上的放大区域)，如图1i所示。
一旦第二多个导电轨迹132和连接焊盘134形成，它们就可用于形成导电互连，诸如焊块、焊球、引线等，用于与外部元件(未示出)连通。例如，焊接掩模材料136可以设在第二介电层126和第二多个导电轨迹132和连接焊盘134上。然后在焊接掩模材料136中形成多个通路以便暴露每个连接焊盘134的至少一部分。可以例如是通过丝网印刷焊锡膏，然后再用回流过程或已知镀覆技术，在每个连接焊盘134的暴露部分上形成诸如焊块等多个导电块138如图1j所示。
图2a-2d说明了包括散热装置的本发明的另一实施例。如图2a所示，把导热散热装置(诸如热片152)附着到微电子管芯后表面114上，最好用的是导热胶(未示出)附着。热片152应当有接近微电子管芯102的CTE(热膨胀系数)以减小热应力。例如，对于由硅材料形成的微电子管芯102，诸如钼和铝/硅/碳合金的导热材料应该与硅材料的CTE很匹配。
保护膜104与微电子管芯有效表面106邻接，如图2b所示。如上所述，保护膜104可以是有粘接性或无粘接性的。然后把微电子管芯102和热片152封装在覆盖微电子管芯侧面116和热片152的侧面154的封装材料112中，如图2c所示。最好不用封装材料112覆盖热片152的后表面156，使得从微电子管芯102进入热片152的热能可以从热片后表面156散发到周围环境中，或者可以在热片后表面156上附着附加散热装置。如图2d所述，封装之后，去除保护膜104，制造至少一个介电层(显示为第一介电层118和第二介电层126)、导电轨迹124和连接焊盘134，如图1c-1i所述。
本发明还包含用于管芯对准、附着和模制的方法。图3a-3f说明了一个这种方法。多个微电子管芯102的有效表面106对准并附着到保护膜104上，保护膜104最好是背面是胶的箔，它在刚性框架162(最好是金属框架)之间伸展，如图3a所示。可以用保护膜104上的基准标志(未示出)来实现多个微电子管芯102的对准。如图3b所示，然后把导热散热装置，诸如热片164用导热胶附着到多个微电子管芯102上。热片164可以是实心板或网样结构，如图3c的俯视图所示。把热片164附着到多个微电子管芯102上之后，在微电子管芯102和热片164周围模制封装材料112，如图3d所示。封装之后，如图3e所示，去除保护膜104而暴露多个微电子管芯102的有效表面106。如图3e所示，制造至少一个介电层(显示为第一介电层118和第二介电层126)、导电轨迹124和132以及连接焊盘134，如图1c-1i所述。当然，要知道，可以在制造多个介电层、导电轨迹和导电焊盘之前或之后将多个微电子管芯102及热片164的相关部分分成单个。
图4a-4e说明了用于管芯对准、附着和模制的方法。如图4a所示，多个微电子管芯102的后表面114对准热片164并用导热胶附着到热片164上。而且，热片164可以是实心板或网样结构，如图3c的俯视图所示。可以用热片164上的基准标志(未示出)来实现多个微电子管芯102的对准。把诸如非粘接性材料的保护膜104装到平板166上，平板166例如是模具的内表面。然后把保护膜104压到多个微电子管芯102的有效表面106上，如图4b所示。在微电子管芯102和热片164周围模制封装材料112，如图4c所示。封装之后，如图4d所示，去除平板166也就去除了保护膜104以便暴露多个微电子管芯102的有效表面106。如图4e所示，制造至少一个介电层(显示为第一介电层118和第二介电层126)、导电轨迹124和132以及连接焊盘134，如图1c-1i所示。而且，要知道，可以在制造多个介电层、导电轨迹和导电焊盘之前或之后将多个微电子管芯102及热片164的相关部分分成单个。
图5a-5f说明了用于管芯对准、附着和模制的又一方法。如图5a所示，诸如通过研磨等使微电子管芯后表面114变薄，以形成薄的微电子管芯172。多个微电子管芯172的后表面174对准起散热装置作用的硅晶片176并用导热胶(未示出)粘接到上面，如图5b所示。可以用硅晶片176上的基准标志(未示出)来实现多个微电子管芯172的对准。诸如非粘接性材料等保护膜104装到平板166上，平板166诸如是模具的内表面。然后把保护膜104压到多个微电子管芯172的有效表面178上，如图5c所示。把封装材料112模制在微电子管芯172和硅晶片176周围，如图5d所示。封装之后，如图5e所示，去除平板166也就去除了保护膜104，从而暴露了多个薄微电子管芯172的有效表面178。如图5f所述，制造至少一个介电层(显示为第一介电层118和第二介电层126)、导电轨迹124和132以及连接焊盘134，如图1c-1i所述。而且，要知道，可以在制造多种介电层、导电轨迹和导电焊盘之前或之后将多个微电子管芯172及硅晶片176的相关部分分成单个。
图6a-6e说明了用于管芯对准、附着和模制的另一方法。如图6a所示，把多个微电子管芯102对准在第一保护膜182上并附着到上面，第一保护膜182最好是背面是胶的箔，它在刚性框架162(最好是金属框架)之间伸展，如图3a所示。可以用第一保护膜182上的基准标志(未示出)来实现多个微电子管芯102的对准。把诸如非粘接性材料的第二保护膜184装到平板166上，平板166诸如是模具的内表面。然后把第二保护膜184压到多个微电子管芯102的有效表面106上，如图6b所示。把封装材料112模制在微电子管芯102周围，如图6c所示。封装之后，如图6d所示，去除平板166也就去除了第二保护膜184，暴露了多个微电子管芯102的有效表面106。如图6e所述，制造至少一个介电层(显示为第一介电层118和第二介电层126)、导电轨迹124和132以及连接焊盘134，如图1c-1i所述。此外，也如图6d所示，去除第一保护膜182，以暴露微电子管芯后表面114。然后可以把露出的微电子管芯后表面114附着到散热装置上。而且，要知道，可以在制造多种介电层、导电轨迹和导电焊盘之前或之后将多个微电子管芯102分成单个。
图7a-7e说明了用于管芯对准、附着和模制的方法。如图7a所示，最好用导热胶(未示出)把多个热片152附着到多个微电子管芯102的后表面114上。把多个热片152的后表面156对准在第一保护膜182上并附着到上面，第一保护膜182最好是背面是胶的箔，它在刚性框架162(最好是金属框架)之间伸展。可以用第一保护膜182上的基准标志(未示出)来实现对准。如图7b所示，把诸如非粘性材料的第二保护膜184装到平板166上，平板166诸如是模具的内表面。然后把第二保护膜184压到多个微电子管芯102的有效表面106上。在微电子管芯102周围模制封装材料112，如图7c所示。封装之后，如图7d所示，去除第一保护膜182也就去除了平板166，还去除了第二保护膜184以便暴露多个微电子管芯102的有效表面106。如图7e所示，制造至少一个介电层(显示为第一介电层118和第二介电层126)、导电轨迹124和132以及连接焊盘134，如图1c-1i所述。
这样描述了本发明的详细实施例，要知道，所附的权利要求书限定的本发明不限于上述特殊细节，在不背离本发明的精神或范围的情况下可以进行许多明显的变化。

Claims (23)

1.一种微电子封装件，包括：
微电子管芯，其具有有效表面和至少一个侧面；
封装材料，其邻近所述至少一个微电子管芯侧面，其中，所述封装材料包含至少一个与所述微电子管芯有效表面基本相平的表面；
第一介电材料层，其设在所述微电子管芯有效表面和所述封装材料表面的至少一部分上；
至少一个导电轨迹，其设在所述第一介电材料层上且与所述微电子管芯有效表面电接触，其中，所述至少一个导电轨迹邻近所述微电子管芯有效表面和所述封装材料表面伸展。
2.根据权利要求1所述的微电子封装件，还包含设在所述至少一个导电轨迹和所述第一介电材料层上的至少一个附加介电材料层。
3.根据权利要求2所述的微电子封装件，其中，所述至少一个导电轨迹的至少一部分伸过所述至少一个附加介电材料层并存在于其上。
4.根据权利要求1所述的微电子封装件，其中，所述微电子管芯还包括后表面，还包括与所述微电子管芯后表面热接触的至少一个散热装置。
5.一种制造微电子封装件的方法，包括：
提供具有有效表面和至少一个侧面的至少一个微电子管芯；
把保护膜靠接在所述至少一个微电子管芯有效表面上；
用封装材料邻近所述至少一个微电子管芯侧面装封装所述至少一个微电子管芯，其中，所述封装材料提供与所述微电子管芯有效表面基本相平的所述封装材料的至少一个表面；
去除所述保护膜。
6.根据权利要求5所述的方法，还包含：
在所述微电子管芯有效表面和所述封装材料表面的至少一部分上形成至少一个介电材料层；
经所述至少一个介电材料层形成通路，以暴露所述微电子管芯有效表面的一部分；和
在所述至少一个介电材料层上形成伸入所述通路从而与所述微电子管芯有效表面电接触的至少一个导电轨迹，其中，所述至少一个导电轨迹邻近所述微电子管芯有效表面并邻近所述封装材料表面伸展。
7.根据权利要求5所述的方法，还包含形成设在所述至少一个导电轨迹和所述至少一个介电材料层上的至少一个附加介电材料层。
8.根据权利要求7所述的方法，其中，在所述至少一个介电层上形成所述至少一个导电轨迹还包括把所述至少一个导电轨迹的至少一部分形成为伸过所述至少一个附加介电材料层并存在于其上。
9.根据权利要求5所述的方法，还包括使散热装置与所述微电子管芯的后表面热接触。
10.一种制造微电子封装件的方法，包括：
提供悬置在大致刚性的框架上的粘接保护膜；
把至少一个微电子管芯的有效表面附着到所述粘接膜上；
用封装材料邻近所述微电子管芯的至少一个侧面封装所述至少一个微电子管芯，其中，所述封装材料提供与所述微电子管芯有效表面基本相平的所述封装材料的至少一个表面；和
去除所述粘接保护膜。
11.根据权利要求10所述的方法，还包括：
在所述微电子管芯有效表面和所述封装材料表面的至少一部分上形成至少一个介电材料层；
经所述至少一个介电材料层形成通路，以暴露所述微电子管芯有效表面的一部分；和
在所述至少一个介电材料层上形成伸入所述通路从而与所述微电子管芯有效表面电接触的至少一个导电轨迹，其中，所述至少一个导电轨迹邻近所述微电子管芯有效表面并邻近所述封装材料表面伸展。
12.根据权利要求10所述的方法，还包括形成设在所述至少一个导电轨迹和所述至少一个介电材料层上的至少一个附加介电材料层。
13.根据权利要求12所述的方法，其中，在所述至少一个介电层上形成所述至少一个导电轨迹还包含把所述至少一个导电轨迹的至少一部分形成为伸过所述至少一个附加介电材料层并存在于其上。
14.根据权利要求10所述的方法，还包括使一散热装置与所述微电子管芯的后表面热接触。
15.一种制造微电子封装件的方法，包括：
提供至少一个微电子管芯，它具有有效表面、后表面和至少一个侧面；
把所述至少一个微电子管芯后表面附着到一散热装置上；
使保护膜与所述至少一个微电子管芯有效表面靠接；
用封装材料封装所述至少一个微电子管芯和所述散热装置，其中，所述封装材料提供与所述微电子管芯有效表面基本相平的所述封装材料的至少一个表面；和
去除所述保护膜。
16.根据权利要求15所述的方法，还包括：
在所述微电子管芯有效表面和所述封装材料表面的至少一部分上形成至少一个介电材料层；
经所述至少一个介电材料层形成通路，以暴露所述微电子管芯有效表面的一部分；和
在所述至少一个介电材料层上形成伸入所述通路从而与所述微电子管芯有效表面电接触的至少一个导电轨迹，其中，所述至少一个导电轨迹邻近所述微电子管芯有效表面并邻近所述封装材料表面伸展。
17.根据权利要求15所述的方法，还包括形成设在所述至少一个导电轨迹和所述至少一个介电材料层上的至少一个附加介电材料层。
18.根据权利要求17所述的方法，其中，在所述至少一个介电层上形成所述至少一个导电轨迹还包含把所述至少一个导电轨迹的至少一部分形成为伸过所述至少一个附加介电材料层并存在于其上。
19.根据权利要求15所述的方法，还包括在把所述至少一个微电子管芯后表面附着到散热装置上之前，使所述至少一个微电子管芯变薄。
20.一种制造微电子封装件的方法，包括：
提供悬置在大致刚性的框架上的粘接保护膜；
把至少一个微电子管芯的后表面附着到所述粘接膜上；
使保护膜与所述至少一个微电子管芯的有效表面靠接；
用封装材料邻近所述微电子管芯的至少一个侧面封装所述至少一个微电子管芯，其中，所述封装材料提供与所述微电子管芯有效表面基本相平的所述封装材料的至少一个表面；
去除所述保护膜；
去除所述粘接保护膜。
21.根据权利要求20所述的方法，还包含：
在所述微电子管芯有效表面和所述封装材料表面的至少一部分上形成至少一个介电材料层；
经所述至少一个介电材料层形成通路，以暴露所述微电子管芯有效表面的一部分；
在所述至少一个介电材料层上形成伸入所述通路从而与所述微电子管芯有效表面电接触的至少一个导电轨迹，其中，所述至少一个导电轨迹邻近所述微电子管芯有效表面并邻近所述封装材料表面伸展。
22.一种制造微电子封装件的方法，包括：
提供悬置在大致刚性的框架上的粘接保护膜；
把至少一个微电子管芯的后表面附着到至少一个散热装置上；
把所述至少一个散热装置的后表面附着到所述粘接膜上；
使保护膜与所述至少一个微电子管芯的有效表面靠接；
用封装材料邻近所述微电子管芯的至少一个侧面封装所述至少一个微电子管芯，其中，所述封装材料提供与所述微电子管芯有效表面基本相平的所述封装材料的至少一个表面；
去除所述保护膜；和
去除所述粘接保护膜。
23.根据权利要求22所述的方法，还包括：
在所述微电子管芯有效表面和所述封装材料表面的至少一部分上形成至少一个介电材料层；
经所述至少一个介电材料层形成通路，以暴露所述微电子管芯有效表面的一部分；
在所述至少一个介电材料层上形成伸入所述通路从而与所述微电子管芯有效表面电接触的至少一个导电轨迹，其中，所述至少个一导电轨迹邻近所述微电子管芯有效表面并邻近所述封装材料表面伸展。
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