CN1512554A - 把集成电路连接到基板上的方法及相应的电路布置 - Google Patents

把集成电路连接到基板上的方法及相应的电路布置 Download PDF

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Publication number
CN1512554A
CN1512554A CNA2003101243799A CN200310124379A CN1512554A CN 1512554 A CN1512554 A CN 1512554A CN A2003101243799 A CNA2003101243799 A CN A2003101243799A CN 200310124379 A CN200310124379 A CN 200310124379A CN 1512554 A CN1512554 A CN 1512554A
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encapsulation
substrate
integrated circuit
contact
contact district
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CN1221021C (zh
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哈里・黑德勒
哈里·黑德勒
・艾尔西格勒
罗兰德·艾尔西格勒
坦・迈耶
索尔斯坦·迈耶
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Infineon Technologies AG
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Infineon Technologies AG
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    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
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Abstract

本发明提供一种把集成电路(5)连接到基板(100)的方法,包括:为集成电路提供一个具有连接面(AS)的封装(1a’;1b’;1c’),在该连接面(AS)上提供有多个用于连接到基板(100)的连接区(150;150,150′);在基板(100)上提供相应连接区(110);在封装(1a’;1b’;1c’)的连接区(150;150,150′)上和/或基板(100)的连接区(110)上提供隆起的接触区(30;35);隆起的接触区(30;35)包括第一组接触区(30)和第二组接触区(35);以及通过隆起的接触区(30;35)创建一个从封装(1a’;1b’;1c’)到基板(100)的连接;以这样一种方式配置隆起的接触区(30;35),使得第一组接触区(30)在封装(1a’;1b’;1c’)与基板(100)之间形成一个刚性连接,且第二组接触区(35)在封装(1a’;1b’;1c’)与基板(100)之间形成一个弹性连接。本发明同样提供一种相应的电路布置。

Description

把集成电路连接到基板上的方法及相应的电路布置
技术领域
本发明涉及一种把集成电路连接到基板上的方法以及相应的电路布置(arrangement)。
背景技术
虽然本发明在原理上可应用于任何期望的集成电路,但是针对硅技术中具有集成电路的芯片来说明本发明和本发明所基于的问题区域。
在温度变化的情况下,尤其是在大电路布置的情况下,已知的用于把集成电路连接到基板上的芯片尺寸封装(CSP)或晶片级封装(WLP)的解决方案存在可靠性的问题,在基板与封装的芯片之间的距离不断地减小的情况下尤其如此。在温度变化期间,封装的电路布置与基板的不同热膨胀系数引起了这两个部件的不同线性膨胀。
在芯片尺寸封装和晶片级封装的情况下,迄今为止实质上已公开了两种类型在芯片与基板之间的连接结构。
第一种用于把集成电路连接到基板上的通常解决方案是把具有刚性焊球或凸起的球栅格阵列用于机械连接,并且附加地使用一种填胶(underfill)以增加稳定性。在这种解决方案的情况下,芯片的热特性与基板的热特性的不匹配,尤其是热膨胀系数的不匹配,导致了较大的可靠性风险。在温度变化的情况下,焊球可能会被切开。这大大限制了可靠性,尤其是在大芯片的情况下。
为了防止这种不希望的缺陷,已开发了各种类型的插入层(interposerlayer),该插入层用作具有低的热膨胀系数的芯片与具有高的热膨胀系数的基板之间的压力缓冲器。这种解决方案增大了结构的高度、连接的数量以及至少成本。
图4所示简图显示了一种插入层类型的电路配置的一部分,用于说明本发明所基于的问题区域。
在图4中,附图标记100表示一个电路基板,例如以一个模块板的形式出现的基板。附图标记1a以组合的方式表示一个集成电路的封装,在这种情况下该集成电路是芯片5。芯片5具有接触垫片6,位于芯片5中的电路的电连接线在该接触垫片6处被向外布线。插入层15借助于粘结层10被应用于芯片5的正面VS上,该插入层15在中心处有一个馈通(feedthrough),引线7通过该馈通以一种用粘合剂8密封的方式被布线,引线7的一端连接到接触垫片6,其另一端连接到连接区140,连接区140被提供于封装1a的连接面AS上。连接区140连接到一个具有多个连接区50的重新布线(rewiring)上,连接区50被提供用于连接到电路基板100上的相应数量的连接区110。
这种机械连接和电连接是通过位于连接区110和150之间的焊球30来实现的,在电路基板110与插入层15之间引入以粘合剂的形式出现的填胶层50。
密封(encapsulation)20,例如由不透明的环氧树脂制成的,被提供于芯片5的背面上。图4中的虚线表示由于热不匹配产生的弯曲效应V,该弯曲效应V的作用是:在这种几何结构的情况下,尤其是边缘区域受到了高压力ST。该压力ST是在温度变化的情况下外围的焊球常常切开或裂开的最终原因。
图5所示的简图显示了一种芯片尺寸型的电路布置的一部分,用于说明本发明所基于的问题区域。
与根据图4的电路布置对比,在根据图5的电路布置中没有提供插入层。相反,介电层25位于芯片5的正面VS上,在芯片5的正面VS上介电层被提供经过重新布线连接到接触垫片6的连接区150。与根据图4的例子相似,提供了焊球30,用以在具有芯片5的封装1b与电路基板100之间提供机械和电连接。为了防止不希望的焊球流走,还在连接面AS上提供一个阻焊层120,该阻焊层120的作用是使焊球30被保持在规定的位置并且不会流走。同样在该例中,为了稳定,提供了一个以粘结层形式出现的未充满层50。
用于把集成电路连接到基板上的更进一步的解决方案是使用弹性隆起(elastic elevation)技术,在WO 00/79589 A1中公开了该方案。WO00/79589 A1公开了一种在一个表面上具有由绝缘材料制成的可变形的凸起部分的电子元件,一个电触点被布置在弹性的隆起上,并且一个传导路径被布置在该电触点与电子电路之间的弹性隆起的表面上或内部中。这种方案的优点是结构的高度较小,可靠性较高,以及成本较低。在这种连接中,众所周知的是把弹性接触元件焊接或粘结到基板上面。
该方案的一个缺点是:与使用焊球的情况相比,在使用弹性塑料接触元件的情况下集成电路的散热要差得多。还有一个缺点是机械稳固性较差。
发明内容
本发明的一个目的是提供一种简单而有成本效益的、用于把集成电路连接到基板上的方法以及相应的电路布置,该电路布置保持了几乎不受热不匹配的影响,另一方面还具有良好的散热特性。
根据本发明,通过根据权利要求1所述的把集成电路连接到基板上的方法和根据权利要求11所述的相应电路布置来实现该目标。
本发明基于的思想是以这样一种方式来配置隆起的接触区,使得第一组接触区在封装与基板之间形成一种刚性连接,而第二组接触区在封装与基板之间形成一种弹性连接。从而,依靠合适的布置,有可能一方面弹性地补偿热不匹配,而另一方面保持良好的散热以及固定的机械连接。在这种连接中,应该提到接触区不是必须具有电接触功能,而是可能至少在一定程度上只具有热/机械功能。
已发现,在本发明的构思下,不同的线性膨胀的影响越大,到电路布置的中性点(neutral point)的距离就越大。从一个到这样一个中性点的特定距离开始,在温度变化期间出现的压力不能再被封装缓和,并且最弱的元件一一般是焊球一被破坏了,这是因为焊接的弹性较小,而且在一个特定的剪切力之上焊接就将裂开。
中性点的特定位置取决于封装的集成电路和基板的几何结构。
在从属权利要求中可以发现对本发明各个主题的有利的开发和改进。
根据本发明的一个优选实施例,第一组接触区被布置在连接面上的一个点周围的近区内,且第二组接触区被布置在围绕该近区外面的远区内。
根据本发明的一个进一步的优选实施例,该点近似位于封装的一个预定方向上的范围的中心。
根据本发明的一个进一步的优选实施例,第一组接触区包括焊接元件,且第二组接触区包括塑料元件。
根据本发明的一个进一步的优选实施例,塑料元件包括导电性的聚合物和/或粘合剂和/或硅酮。
根据本发明的一个进一步的优选实施例,塑料元件在其要被连接的一面上具有可焊接的金属涂层。
根据本发明的一个进一步的优选实施例,塑料元件包括不导电的聚合物和/或粘合剂和/或硅酮,并且在其要被连接的一面有一个金属互连,所述互连被电连接到集成电路。
根据本发明的一个进一步的优选实施例,封装(package)在集成电路的正面上有一个插入层,封装的连接区被提供于所述插入层远离集成电路的那一面上。
根据本发明的一个进一步的优选实施例,封装在集成电路的正面上有一个绝缘层,封装的连接区被提供于所述绝缘层远离集成电路的那一面上。
根据本发明的一个进一步的优选实施例,至少在集成电路的背面上为封装提供密封。
附图说明
在以下的附图中图解说明本发明的示范实施例,并在以下的说明中对它们进行更详细地说明。
在附图中:
图1a、1b所示的简图显示了根据本发明第一实施例的电路布置的一部分;
图2所示的简图显示了根据本发明第二实施例的电路布置的一部分;
图3所示的简图显示了根据本发明第三实施例的电路布置的一部分;
图4所示的简图显示了一种插入层型的电路布置的一部分,用于说明本发明所基于的问题区域;以及
图5所示的简图显示了一种芯片尺寸型的电路布置的一部分,用于说明本发明所基于的问题区域。
在附图中,相同的附图标记表示相同的或功能上相同的组成部分。
具体实施方式
图1a、1b所示的简图显示了根据本发明第一实施例的电路布置的一部分。
在图1a中,附图标记1a表示一个改进的封装,其不同于图4中的例子的地方在于:在连接面AS上,只在位于一个相对于中性点NP的特定近区IR内的连接区150上提供焊球30。
所述中性点NP是对于x方向上的、不同元件的热不匹配在此具有最小影响的一个点。换句话说,在该点没有或只有非常小的压力。这些压力将随着到该中性点的距离的增大而增大。在近区IR内,所述的压力被限制为在预期的温度变化范围内不会导致破坏性的改变的幅度。因此,用于连接到电路基板(circuit substrate)100的接触区是位于此处的焊球30。
相反,在远区OR内的压力大得使焊球30不能承受这些压力。因此,在该实施例中,在远区OR内的相应连接区150处提供弹性的导电塑料元件35,该塑料元件35在其连接面即用于连接到电路基板100的面上有一个可焊接金属的金属化区38。
参照图1b,到电路基板100的连接在以下两个区域内受到影响:以通常的方式出现的焊球30的区域;以及塑料元件35的区域,该塑料元件35的区域借助了附加的、在本例中被应用于电路基板的相应连接区110的焊剂39。
最后所得的在具有芯片5的封装1a’与电路基板100之间的连接对由于热不匹配产生的压力ST的敏感度大大减小了。这是因为所述的弹性塑料元件35能够被压缩、膨胀和变形到一个大得多的程度。
虽然在该示范实施例中所有接触区30、35具有电气功能,但是这不是绝对必需的;作为例子,有可能提供附加的、只具有机械或热/机械功能的接触区30和35。
图2所示的简图显示了根据本发明第二实施例的电路布置的一部分。
根据图2的实施例对应于以上参照图5说明的已知电路布置。在此,接触元件也被保持为在中性点NP的近区IR内的焊球30的形式。相反,在位于远区OR中的连接区150′中提供由绝缘材料制成的弹性塑料元件。此处的连接区150′是不导电的,而是只用于机械连接。
为了产生一个到与芯片5的接触垫片6相连的重新布线的导电连接,互连150″已被布线到弹性塑料元件35的表面上。因此,如以上在第一实施例中所述的一样,具有芯片5的封装1b’能够被粘结或焊接到电路基板100上,并且有可能获得如第一实施例中的优点。
图3所示的简图显示了根据本发明第三实施例的电路布置的一部分。
根据图3的实施例与根据图2的实施例的不同之处只在于:重新布线区在芯片的侧边上被加长了,通常也被称为“扇出”。
虽然以上是根据优选的示范实施例说明了本发明,但是本发明并不是被限制为这些示范实施例,而是可以以多种方式被修改。
尤其是,本发明不仅可应用于芯片,还可应用于混合电路、晶片或其它集成电路。而且,本发明不受特定材料的限制。
附图标记对照表
100电路基板
20密封
110,150,140,150′连接区
7线
8粘合剂
AS连接面
VS正面
RS背面
5芯片
10粘结层
15插入层
30焊球
35塑料元件
6接触垫片
38金属化区
IR近区
OR远区
1a,1b,1a’,1b’,1c’包含芯片的封装
NP中性点
ST压力
V弯曲效应
39焊剂
150″互连
25介电层
120焊接阻层

Claims (20)

1.一种把集成电路(5)尤其是一个芯片或晶片或混合电路连接到基板(100)的方法,该方法包括以下步骤:
为集成电路提供一个具有连接面(AS)的封装(1a’;1b’;1c’),在该连接面(AS)上提供有多个用于连接到基板(100)的连接区(150;150,150′);
在基板(100)上提供相应多个连接区(110);
在封装(1a’;1b’;1c’)的连接区(150;150,150′)上和/或基板(100)的连接区(110)上提供隆起的接触区(30;35);
隆起的接触区(30;35)包括第一组接触区(30)和第二组接触区(35);
通过隆起的接触区(30;35)创建一个从封装(1a’;1b’;1c’)到基板(100)的连接;
以这样一种方式配置隆起的接触区(30;35),即,第一组接触区(30)在封装(1a’;1b’;1c’)与基板(100)之间形成一个刚性连接,且第二组接触区(35)在封装(1a’;1b’;1c’)与基板(100)之间形成一个弹性连接。
2.根据权利要求1所述的方法,其特征在于,第一组接触区(30)被布置在连接面(AS)上的一个点(NP)周围的近区(IR)内,且第二组接触区(35)被布置在围绕该近区(IR)外面的远区(OR)内。
3.根据权利要求2所述的方法,其特征在于,该点(NP)近似位于封装(1a’;1b’;1c’)的一个预定方向(x方向)上的范围的中心。
4.根据权利要求1、2或3所述的方法,其特征在于,第一组接触区(30)包括焊接元件,且第二组接触区(35)包括塑料元件。
5.根据权利要求4所述的方法,其特征在于,塑料元件包括导电性的聚合物和/或粘合剂和/或硅酮。
6.根据权利要求5所述的方法,其特征在于,塑料元件在其要被连接的一面上具有可焊接的金属涂层(38)。
7.根据权利要求4所述的方法,其特征在于,塑料元件包括不导电的聚合物和/或粘合剂和/或硅酮,并且在其要被连接的一面有一个金属互连(150″),所述互连被电连接到集成电路(5)。
8.根据前述权利要求之一所述的方法,其特征在于,封装(1a’)在集成电路(5)的正面(VS)上有一个插入层(15),封装(1a’)的连接区(150)被提供于所述插入层远离集成电路(5)的那一面上。
9.根据前述的权利要求1-7之一所述的方法,其特征在于,封装(1b’;1c’)在集成电路(5)的正面(VS)上有一个绝缘层(25),封装(1b’;1c’)的连接区(150)被提供于所述绝缘层远离集成电路(5)的那一面上。
10.根据前述权利要求之一所述的方法,其特征在于,至少在集成电路(5)的背面(VS)上为封装(1b’;1c’)提供密封(20)。
11.一种电路布置,其具有一个从集成电路(5)尤其从是一个芯片或晶片或混合电路到基板(100)的连接,该电路布置包括:
一个具有连接面(AS)的集成电路封装(1a’;1b’;1c’),在该连接面(AS)上提供有多个用于连接到基板(100)的连接区(150;150,150′);
在基板(100)上的相应多个连接区(110);以及
隆起的接触区(30;35),该接触区(30;35)把封装(1a’;1b’;1c’)的连接区(150;150,150′)连接到基板(100)的连接区(110);
该隆起的接触区(30;35)包括以这样一种方式被配置的第一组接触区(30)和第二组接触区(35),即第一组接触区(30)在封装(1a’;1b’;1c’)与基板(100)之间形成一个刚性连接,且第二组接触区(35)在封装(1a’;1b’;1c’)与基板(100)之间形成一个弹性连接。
12.根据权利要求11所述的方法,其特征在于,第一组接触区(30)被布置在连接面(AS)上的一个点(NP)周围的近区(IR)内,且第二组接触区(35)被布置在围绕该近区(IR)外面的远区(OR)内。
13.根据权利要求12所述的方法,其特征在于,该点(NP)近似位于封装(1a’;1b’;1c’)的一个预定方向(x方向)上的范围的中心。
14.根据权利要求11、12或13所述的方法,其特征在于,第一组接触区(30)包括焊接元件,且第二组接触区(35)包括塑料元件。
15.根据权利要求14所述的方法,其特征在于,塑料元件包括导电的聚合物和/或粘合剂和/或硅酮。
16.根据权利要求15所述的方法,其特征在于,塑料元件在其要被连接的一面上具有可焊接的金属涂层(38)。
17.根据权利要求14所述的方法,其特征在于,塑料元件包括电绝缘的聚合物和/或粘合剂和/或硅酮,并且在其要被连接的一面有一个金属互连(150″),所述互连被电连接到集成电路(5)。
18.根据前述权利要求11-17之一所述的方法,其特征在于,封装(1a’)在集成电路(5)的正面(VS)上有一个插入层(15),封装(1a’)的连接区(150)被提供于所述插入层远离集成电路(5)的那一面上。
19.根据前述权利要求11-17之一所述的方法,其特征在于,封装(1b’;1c’)在集成电路(5)的正面(VS)上有一个绝缘层(25),封装(1b’;1c’)的连接区(150)被提供于所述绝缘层远离集成电路(5)的那一面上。
20.根据前述权利要求11-19之一所述的方法,其特征在于,至少在集成电路(5)的背面(VS)上为封装(1b’;1c’)提供密封(20)。
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