CN1425193A - 闪存技术和locos/sti隔离的氮化隧道氧化物的氮化障壁 - Google Patents
闪存技术和locos/sti隔离的氮化隧道氧化物的氮化障壁 Download PDFInfo
- Publication number
- CN1425193A CN1425193A CN00818639A CN00818639A CN1425193A CN 1425193 A CN1425193 A CN 1425193A CN 00818639 A CN00818639 A CN 00818639A CN 00818639 A CN00818639 A CN 00818639A CN 1425193 A CN1425193 A CN 1425193A
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- China
- Prior art keywords
- photo
- metal photomask
- resistive mask
- oxide layer
- layer
- Prior art date
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B99/00—Subject matter not provided for in other groups of this subclass
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/981—Utilizing varying dielectric thickness
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Non-Volatile Memory (AREA)
- Element Separation (AREA)
- Semiconductor Memories (AREA)
- Local Oxidation Of Silicon (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
Description
Claims (13)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/491,457 US6509604B1 (en) | 2000-01-26 | 2000-01-26 | Nitridation barriers for nitridated tunnel oxide for circuitry for flash technology and for LOCOS/STI isolation |
US09/491,457 | 2000-01-26 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1425193A true CN1425193A (zh) | 2003-06-18 |
CN1196187C CN1196187C (zh) | 2005-04-06 |
Family
ID=23952302
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CNB008186391A Expired - Fee Related CN1196187C (zh) | 2000-01-26 | 2000-12-13 | 存储器的locos/sti隔离结构 |
Country Status (7)
Country | Link |
---|---|
US (2) | US6509604B1 (zh) |
EP (1) | EP1250714A1 (zh) |
JP (2) | JP2003521121A (zh) |
KR (1) | KR100717411B1 (zh) |
CN (1) | CN1196187C (zh) |
TW (1) | TWI248659B (zh) |
WO (1) | WO2001056075A1 (zh) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101136365B (zh) * | 2006-08-31 | 2010-11-17 | 茂德科技股份有限公司(新加坡子公司) | 在隔离沟渠具有减少介电质耗损的半导体元件及制造方法 |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003188291A (ja) * | 2001-12-20 | 2003-07-04 | Nec Electronics Corp | 不揮発性半導体記憶装置の製造方法 |
KR100503234B1 (ko) * | 2003-02-04 | 2005-07-22 | 동부아남반도체 주식회사 | 비휘발성 메모리 제조 방법 |
US7358146B2 (en) * | 2003-06-24 | 2008-04-15 | Micron Technology, Inc. | Method of forming a capacitor |
DE10345237B4 (de) * | 2003-09-29 | 2005-11-10 | Infineon Technologies Ag | Verfahren zur Herstellung von Charge-Trapping-Speicherbauelementen |
US7183143B2 (en) * | 2003-10-27 | 2007-02-27 | Macronix International Co., Ltd. | Method for forming nitrided tunnel oxide layer |
US7160771B2 (en) * | 2003-11-28 | 2007-01-09 | International Business Machines Corporation | Forming gate oxides having multiple thicknesses |
US20050130448A1 (en) * | 2003-12-15 | 2005-06-16 | Applied Materials, Inc. | Method of forming a silicon oxynitride layer |
US20050167733A1 (en) * | 2004-02-02 | 2005-08-04 | Advanced Micro Devices, Inc. | Memory device and method of manufacture |
US7153778B2 (en) * | 2004-02-20 | 2006-12-26 | Micron Technology, Inc. | Methods of forming openings, and methods of forming container capacitors |
KR100781033B1 (ko) * | 2005-05-12 | 2007-11-29 | 주식회사 하이닉스반도체 | 반도체 소자의 제조방법 |
US7429538B2 (en) * | 2005-06-27 | 2008-09-30 | Applied Materials, Inc. | Manufacturing method for two-step post nitridation annealing of plasma nitrided gate dielectric |
US7964514B2 (en) * | 2006-03-02 | 2011-06-21 | Applied Materials, Inc. | Multiple nitrogen plasma treatments for thin SiON dielectrics |
US7501648B2 (en) * | 2006-08-16 | 2009-03-10 | International Business Machines Corporation | Phase change materials and associated memory devices |
CN102208334B (zh) * | 2011-05-27 | 2016-03-23 | 上海华虹宏力半导体制造有限公司 | 半导体器件局部氧化终止环的制备方法 |
CN104952734B (zh) * | 2015-07-16 | 2020-01-24 | 矽力杰半导体技术(杭州)有限公司 | 半导体结构及其制造方法 |
CN113488436B (zh) * | 2021-09-06 | 2021-12-21 | 晶芯成(北京)科技有限公司 | 一种半导体结构及其制造方法 |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH07111288A (ja) | 1993-10-12 | 1995-04-25 | Matsushita Electric Ind Co Ltd | 素子分離の形成方法 |
US5591681A (en) * | 1994-06-03 | 1997-01-07 | Advanced Micro Devices, Inc. | Method for achieving a highly reliable oxide film |
JPH08167705A (ja) | 1994-12-15 | 1996-06-25 | Toshiba Corp | 不揮発性半導体記憶装置及びその製造方法 |
JP3444687B2 (ja) * | 1995-03-13 | 2003-09-08 | 三菱電機株式会社 | 不揮発性半導体記憶装置 |
DE69528970D1 (de) * | 1995-06-30 | 2003-01-09 | St Microelectronics Srl | Herstellungsverfahren eines Schaltkreises, der nichtflüchtige Speicherzellen und Randtransistoren enthält, und entsprechender IC |
EP0751560B1 (en) | 1995-06-30 | 2002-11-27 | STMicroelectronics S.r.l. | Process for forming an integrated circuit comprising non-volatile memory cells and side transistors of at least two different types, and corresponding IC |
KR100214068B1 (ko) * | 1995-11-21 | 1999-08-02 | 김영환 | 반도체 장치의 소자분리막 형성방법 |
JPH09289298A (ja) * | 1996-02-23 | 1997-11-04 | Nippon Steel Corp | 半導体装置及びその製造方法 |
KR100669996B1 (ko) * | 1997-03-28 | 2007-01-16 | 가부시끼가이샤 르네사스 테크놀로지 | 불휘발성 반도체 기억장치 및 그 제조방법 및 반도체 장치및 그 제조방법 |
US5858830A (en) | 1997-06-12 | 1999-01-12 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making dual isolation regions for logic and embedded memory devices |
JPH1140779A (ja) * | 1997-07-17 | 1999-02-12 | Mitsubishi Electric Corp | 半導体装置および半導体装置の製造方法 |
JP3967440B2 (ja) * | 1997-12-09 | 2007-08-29 | 株式会社ルネサステクノロジ | 半導体集積回路装置の製造方法 |
US6080682A (en) * | 1997-12-18 | 2000-06-27 | Advanced Micro Devices, Inc. | Methodology for achieving dual gate oxide thicknesses |
TW374939B (en) * | 1997-12-19 | 1999-11-21 | Promos Technologies Inc | Method of formation of 2 gate oxide layers of different thickness in an IC |
KR100295150B1 (ko) * | 1997-12-31 | 2001-07-12 | 윤종용 | 비휘발성메모리장치의동작방법과상기동작을구현할수있는장치및그제조방법 |
US6004862A (en) | 1998-01-20 | 1999-12-21 | Advanced Micro Devices, Inc. | Core array and periphery isolation technique |
TW480713B (en) * | 1998-03-03 | 2002-03-21 | Mosel Vitelic Inc | Method for forming different thickness of field oxide in integrated circuit and the structure of the same |
US5972751A (en) * | 1998-08-28 | 1999-10-26 | Advanced Micro Devices, Inc. | Methods and arrangements for introducing nitrogen into a tunnel oxide in a non-volatile semiconductor memory device |
US6284602B1 (en) * | 1999-09-20 | 2001-09-04 | Advanced Micro Devices, Inc. | Process to reduce post cycling program VT dispersion for NAND flash memory devices |
-
2000
- 2000-01-26 US US09/491,457 patent/US6509604B1/en not_active Expired - Fee Related
- 2000-12-13 WO PCT/US2000/034213 patent/WO2001056075A1/en not_active Application Discontinuation
- 2000-12-13 JP JP2001555131A patent/JP2003521121A/ja active Pending
- 2000-12-13 EP EP00984473A patent/EP1250714A1/en active Pending
- 2000-12-13 CN CNB008186391A patent/CN1196187C/zh not_active Expired - Fee Related
- 2000-12-13 KR KR1020027009517A patent/KR100717411B1/ko not_active IP Right Cessation
-
2001
- 2001-01-29 TW TW090101702A patent/TWI248659B/zh not_active IP Right Cessation
-
2002
- 2002-11-15 US US10/295,738 patent/US6605511B2/en not_active Expired - Fee Related
-
2010
- 2010-09-10 JP JP2010203354A patent/JP5881032B2/ja not_active Expired - Lifetime
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101136365B (zh) * | 2006-08-31 | 2010-11-17 | 茂德科技股份有限公司(新加坡子公司) | 在隔离沟渠具有减少介电质耗损的半导体元件及制造方法 |
Also Published As
Publication number | Publication date |
---|---|
JP2003521121A (ja) | 2003-07-08 |
CN1196187C (zh) | 2005-04-06 |
US6605511B2 (en) | 2003-08-12 |
JP2010283387A (ja) | 2010-12-16 |
JP5881032B2 (ja) | 2016-03-09 |
WO2001056075A1 (en) | 2001-08-02 |
TWI248659B (en) | 2006-02-01 |
KR100717411B1 (ko) | 2007-05-11 |
KR20020070356A (ko) | 2002-09-05 |
US20030073288A1 (en) | 2003-04-17 |
EP1250714A1 (en) | 2002-10-23 |
US6509604B1 (en) | 2003-01-21 |
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Legal Events
Date | Code | Title | Description |
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C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
ASS | Succession or assignment of patent right |
Owner name: SPANSION CO.,LTD. Free format text: FORMER OWNER: ADVANCED MICRO DEVICES INC. Effective date: 20070420 Owner name: SPANSION CO., LTD. Free format text: FORMER OWNER: SPANSION CO.,LTD. Effective date: 20070420 |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20070420 Address after: California, USA Patentee after: SPANSION LLC Address before: California, USA Patentee before: Spanson Co. Effective date of registration: 20070420 Address after: California, USA Patentee after: Spanson Co. Address before: California, USA Patentee before: ADVANCED MICRO DEVICES, Inc. |
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C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20160317 Address after: California, USA Patentee after: CYPRESS SEMICONDUCTOR Corp. Address before: California, USA Patentee before: SPANSION LLC |
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CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20050406 Termination date: 20151213 |
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EXPY | Termination of patent right or utility model |