CN1421047A - 用于测量电子器件参数的方法及设备 - Google Patents

用于测量电子器件参数的方法及设备 Download PDF

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CN1421047A
CN1421047A CN01802316A CN01802316A CN1421047A CN 1421047 A CN1421047 A CN 1421047A CN 01802316 A CN01802316 A CN 01802316A CN 01802316 A CN01802316 A CN 01802316A CN 1421047 A CN1421047 A CN 1421047A
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L·布尔迪永
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Silergy Corp
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Koninklijke Philips Electronics NV
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78618Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
    • H01L29/78621Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
    • H01L29/78624Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78603Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support

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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Ceramic Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Testing Of Individual Semiconductor Devices (AREA)
  • Measurement Of Resistance Or Impedance (AREA)
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Abstract

利用衬底与SOI器件的漏极之间的固有电容作为电路的部分。衬底与引到芯片外部的传感针连接,并与其它电气元件形成环路,形成包括衬底与漏极之间的固有电容的电路,该电路利用衬底与漏极之间的电容运行。

Description

用于测量电子器件参数的方法及设备
本发明涉及电子器件,尤其是测量绝缘体上的硅(SOI)和类似器件的参数的改进技术。
图1表示具有其它元件构成的两种半导体器件102和103从而形成半桥电路的现有技术结构示例。器件可以是MOS器件、SOI、或其它类型器件。一般利用公知技术制造器件,其中在衬底201上沉积各种所需的层,如图2所示。器件102和103一般均制备在芯片上,边界125表示芯片的外边缘。
如图1所示,一种标准应用包括使用外电容器105和106来测量半桥的输出。传感引线107通常与芯片的外侧相连,芯片外侧上存在SOI器件102和103。利用标准设备可测量传感引线。用外部元件的剩余部分、电感器108、电容器109和115以及电阻110,形成标准谐振输出电路。
在工作中,高电压电容器105将交流信号传送到传感引线107,该信号输送到测量器件,以便从外部设备监控SOI器件的运行。该结构基本上令人满足,但利用外部部件增加了成本,降低了可靠性。
在各种应用中需要外部监控。例如,在一些开关电路中,希望器件的运行保持在所谓软开关区中。如果接近硬开关区,实现该目的的唯一方法是监控器件的运行并提供修正。
鉴于上述,希望构建不需要如此多的附加部件的传感设备。也希望使该器件的制备成本最低。另一目的是希望不需要附加的外电容器。
按照本发明,克服以前技术的上述和其它问题,涉及实现用于传感的所需电容器的技术,而无需增加成本以及以前技术一般所需的连接。具体而言,单独的传感引线由器件衬底传送到外引脚(externalpin)。在衬底与漏之间的固有剩余电容用作传感电容器。通常认为该剩余电容是不需要的寄生电容。应用包括使用该内传感电容器以便控制逻辑门,调节或控制外部器件,或保持器件处于软开关区。在另一实施例中,也可使用在衬底与器件的其它部分(例如栅极或源极)之间的固有电容。
图1是具有SOI器件和几个外部电容器的已有技术结构的例子;
图2表示SOI器件的物理结构的横截面;
图3描述了表示源与漏的传统内连接的已有技术结构的例子;
图4表示按照本发明连接的器件的结构例子;
图5表示本发明的另一实施例;和
图6描述了和一个或多个外部逻辑门一起应用本发明。
图2表示典型SOI器件的横截面,SOI器件包括衬底层201和掩埋氧化物层202。按照该器件的标准制造技术,表示剩余层。该器件包括源极204、栅极205和漏极206。存在多种市售器件,而所用的特定器件并不是本发明的关键。
在典型应用中,衬底层204直接与源层相连,如图3所示。该连接位于半导体芯片内,如图3所示,虚线边缘309表示器件的外边缘。通常,单个外封装包括表示源、栅和漏的3个端子以及也与漏极相连的小接头。
图1中使用外部电容器105和106,未能利用衬底201与漏极206之间的固有电容的优点,如图3的电容307所示。该电容只是制备这些器件中所固有的物理特性、尺寸和其它参数的结果。该固有电容307由本领域的技术人员容易计算出并存在于器件上,而无需增加任何成本。电容器307的值取决于漏极的尺寸、图2的衬底201的面积以及掩埋氧化物层202的面积。
具体而言,参考图2,因为掩埋氧化物层202充当漏极206与衬底201之间的绝缘体,形成电容。然后,漏极206和衬底201充当电容器的极板。因此,可使用用于计算平行板电容器的电容的标准等式。
应当注意,在衬底层201与在掩埋氧化物层202之上器件的其它部分之间也存在固有电容。因为漏的典型面积大得足以提供更高值的电容器,选择并应用漏/衬底电容,高值电容器通常是测量电路所需要的,以确保在软开关区内运行。因此,为便于说明,在此将漏衬底电容用作例子。然而,本发明并未排除使用衬底/栅极电容,或衬底/源极电容当作有价值的测量元件。
如图4所示,本发明设想源与衬底内部不相连。取而代之,从衬底引出单个针到器件的外侧,用于测量目的。一个方便技术包括在器件封装的外侧使用小接头。具体而言,在部件例如标准T0-220的外侧上的接头,有时用作散热片并经常与漏极相连,接头可与衬底连接,而代替与漏极连接。这可使用传统器件封装,而不用改型。
如图4所示,传感针406随后在器件外部与测量设备相连。测量设备410与传感器406和公共接地连接。由于电容器307可使变化的信号通过,却抑制直流,图4的衬底传感器406是表示漏极电压的衍生物的信号。
由此漏极/衬底电容307用作传感机构。具体而言,电容器307上的电流是测量漏极206处电压相对时间的变化。由于该固有电容器提供必要的信号,可取消外部电容器105。
图5表示本发明的一个实施例,其中电阻501与内部电容307串联布置。按照沉积电阻的传统技术,电阻制备在具有SOI器件的芯片上。然后传感针511从外部引到芯片,传感针表示电容器307与内电阻501之间的电压部分。因此,在图5的实施例中,固有电容307用作分压电路的部件。
图6表示本发明的另一实施例,包括与上述内电阻501串联的固有电容307。此时,一组逻辑电路601加入到传感点,控制针602处产生的输出。逻辑电路接收与电容器307两端的电压变化比率成比例的信号。可使用逻辑来控制门(例如如果电压变化太快,则将其切断)。注意逻辑电路601包括一个或多个逻辑门,并在芯片或外部上起作用。
上述讨论相对于漏极与衬底之间的固有电容,在衬底与栅极之间、以及衬底与源极之间也存在电容。由于衬底经图4的针406引到器件外部点,又可提供这些低电容。
上面描述了优选实施例,本领域的技术人员可进行各种改型/添加。具体而言,相对本发明可改变外部和内部所用的结构。将衬底201引到芯片外部的传感针406或511可与各种电容器、电阻或其它电子部件连接。基于测量参数而改变器件运行的控制电路可与在此所示的有所不同,本领域的技术人员可采用其它传感针。上述均被如下权利要求所包括。

Claims (13)

1.一种电子器件,具有源极(204)、栅极(205)和漏极(206),所述电子器件位于衬底(201)上,所述电子器件和衬底在具有外部针(406)的芯片内,所述衬底与外部针(406)电连接,而不与所述源极连接。
2.按权利要求1所述的器件,还包括在所述衬底和所述源极之间相连的电阻(501),所述电阻在所述芯片内。
3.按权利要求2所述的器件,其中所述电阻在公共点连接到所述衬底与至少一个逻辑门(601),以便监控所述点处的电启动。
4.一种测量SOI器件中固有电容器上的电压变化的方法,所述方法包括步骤:将所述器件的外部分(406)直接与所述衬底连接,以及测量所述外部分上的电信号。
5.按权利要求4所述的方法,其中所述芯片内的附加电气元件(501)连接在所述衬底与所述源极之间。
6.一种半导体器件,包括导电衬底层(201)、半导体层(202)和漏极(206),所述半导体器件位于芯片上并包括与衬底(201)连接而不与源极连接的针(406),针(406)延伸到所述芯片外部的点。
7.按权利要求6所述的半导体,还包括与所述芯片外部的所述点相连的至少一个逻辑门(601)。
8.按权利要求6所述的半导体器件,还包括位于所述芯片上并连接在所述源极与所述衬底之间的电阻(501)。
9.按权利要求8所述的半导体器件,还包括与此相连的测量设备。
10.一种测量器件的电启动的方法,器件具有源极(204)、栅极(205)、漏极(206)和衬底(201),该方法包括:
在衬底与接地之间连接测量器件(410);
利用所述测量器件(410),测量所述衬底(201)上产生的信号变化的比率,和
基于所述测量步骤,调节所述器件的运行。
11.按权利要求10的方法,其中所述调节步骤包括利用逻辑门(601)进行处理。
12.一种形成包括电容器的电子电路的方法,包括如下步骤:
制备包括源极(204)、栅极(205)和漏极(206)的SOI器件;
计算在所述衬底与所述源极(204)、所述漏极(206)或所述栅极(205)任一之间的电容值;
计算在包括所述SOI器件外的元件的电路中所需的电容器值;和
连接包括多个电气元件的电路,使得在所述衬底与所述源极(204)、所述漏极(206)或所述栅极(205)任一之间的电容用作所述需要的电容器,或形成其部分。
13.按权利要求12所述的方法,还包括在所述SOI器件上制备电阻(501)的步骤。
CNB018023169A 2000-08-07 2001-07-20 用于测量电子器件参数的方法及设备 Expired - Lifetime CN1240140C (zh)

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CN103969544B (zh) * 2014-03-04 2018-02-16 深圳博用科技有限公司 一种集成电路高压引脚连通性测试方法

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JP2698645B2 (ja) 1988-05-25 1998-01-19 株式会社東芝 Mosfet
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US20030016047A1 (en) 2003-01-23
EP1309995A2 (en) 2003-05-14

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