ATE456156T1 - Methode und vorrichtung zum messen von parametern eines elektronischen bauelementes - Google Patents
Methode und vorrichtung zum messen von parametern eines elektronischen bauelementesInfo
- Publication number
- ATE456156T1 ATE456156T1 AT01969473T AT01969473T ATE456156T1 AT E456156 T1 ATE456156 T1 AT E456156T1 AT 01969473 T AT01969473 T AT 01969473T AT 01969473 T AT01969473 T AT 01969473T AT E456156 T1 ATE456156 T1 AT E456156T1
- Authority
- AT
- Austria
- Prior art keywords
- electronic component
- measuring parameters
- substrate
- drain
- circuit
- Prior art date
Links
- 239000000758 substrate Substances 0.000 abstract 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
- H01L29/78618—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure
- H01L29/78621—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile
- H01L29/78624—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device characterised by the drain or the source properties, e.g. the doping structure, the composition, the sectional shape or the contact structure with LDD structure or an extension or an offset region or characterised by the doping profile the source and the drain regions being asymmetrical
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measurement Of Resistance Or Impedance (AREA)
- Investigating Or Analyzing Materials By The Use Of Electric Means (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Testing Electric Properties And Detecting Electric Faults (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US09/633,761 US6433573B1 (en) | 2000-08-07 | 2000-08-07 | Method and apparatus for measuring parameters of an electronic device |
PCT/EP2001/008474 WO2002013259A2 (en) | 2000-08-07 | 2001-07-20 | Method and apparatus for measuring parameters of an electronic device |
Publications (1)
Publication Number | Publication Date |
---|---|
ATE456156T1 true ATE456156T1 (de) | 2010-02-15 |
Family
ID=24541027
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
AT01969473T ATE456156T1 (de) | 2000-08-07 | 2001-07-20 | Methode und vorrichtung zum messen von parametern eines elektronischen bauelementes |
Country Status (8)
Country | Link |
---|---|
US (2) | US6433573B1 (de) |
EP (1) | EP1309995B1 (de) |
JP (1) | JP2004506217A (de) |
KR (1) | KR100803493B1 (de) |
CN (1) | CN1240140C (de) |
AT (1) | ATE456156T1 (de) |
DE (1) | DE60141144D1 (de) |
WO (1) | WO2002013259A2 (de) |
Families Citing this family (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2006071292A (ja) * | 2004-08-31 | 2006-03-16 | Sanyo Electric Co Ltd | 回路装置の製造方法 |
US7741823B2 (en) * | 2007-01-29 | 2010-06-22 | Agere Systems Inc. | Linear voltage regulator with improved large transient response |
US8631371B2 (en) | 2011-06-29 | 2014-01-14 | International Business Machines Corporation | Method, system and program storage device for modeling the capacitance associated with a diffusion region of a silicon-on-insulator device |
CN102866303A (zh) * | 2011-07-05 | 2013-01-09 | 中国科学院微电子研究所 | 纳米器件沟道超薄栅介质电容测试方法 |
CN103969544B (zh) * | 2014-03-04 | 2018-02-16 | 深圳博用科技有限公司 | 一种集成电路高压引脚连通性测试方法 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61280651A (ja) * | 1985-05-24 | 1986-12-11 | Fujitsu Ltd | 半導体記憶装置 |
US4864374A (en) | 1987-11-30 | 1989-09-05 | Texas Instruments Incorporated | Two-transistor dram cell with high alpha particle immunity |
JP2698645B2 (ja) | 1988-05-25 | 1998-01-19 | 株式会社東芝 | Mosfet |
US5382818A (en) | 1993-12-08 | 1995-01-17 | Philips Electronics North America Corporation | Lateral semiconductor-on-insulator (SOI) semiconductor device having a buried diode |
KR0135804B1 (ko) * | 1994-06-13 | 1998-04-24 | 김광호 | 실리콘 온 인슐레이터(soi) 트랜지스터 |
JP3732914B2 (ja) | 1997-02-28 | 2006-01-11 | 株式会社ルネサステクノロジ | 半導体装置 |
US6188234B1 (en) * | 1999-01-07 | 2001-02-13 | International Business Machines Corporation | Method of determining dielectric time-to-breakdown |
-
2000
- 2000-08-07 US US09/633,761 patent/US6433573B1/en not_active Expired - Fee Related
-
2001
- 2001-07-20 AT AT01969473T patent/ATE456156T1/de not_active IP Right Cessation
- 2001-07-20 DE DE60141144T patent/DE60141144D1/de not_active Expired - Lifetime
- 2001-07-20 WO PCT/EP2001/008474 patent/WO2002013259A2/en active Application Filing
- 2001-07-20 KR KR1020027004350A patent/KR100803493B1/ko not_active IP Right Cessation
- 2001-07-20 JP JP2002518519A patent/JP2004506217A/ja not_active Withdrawn
- 2001-07-20 EP EP01969473A patent/EP1309995B1/de not_active Expired - Lifetime
- 2001-07-20 CN CNB018023169A patent/CN1240140C/zh not_active Expired - Lifetime
-
2002
- 2002-07-24 US US10/202,246 patent/US6876036B2/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
WO2002013259A3 (en) | 2002-04-11 |
CN1240140C (zh) | 2006-02-01 |
KR100803493B1 (ko) | 2008-02-14 |
US20030016047A1 (en) | 2003-01-23 |
KR20020047212A (ko) | 2002-06-21 |
US6876036B2 (en) | 2005-04-05 |
EP1309995A2 (de) | 2003-05-14 |
DE60141144D1 (de) | 2010-03-11 |
CN1421047A (zh) | 2003-05-28 |
WO2002013259A2 (en) | 2002-02-14 |
EP1309995B1 (de) | 2010-01-20 |
JP2004506217A (ja) | 2004-02-26 |
US6433573B1 (en) | 2002-08-13 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |