CN1257599A - 用于芯片卡的电子组件 - Google Patents

用于芯片卡的电子组件 Download PDF

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CN1257599A
CN1257599A CN98805448A CN98805448A CN1257599A CN 1257599 A CN1257599 A CN 1257599A CN 98805448 A CN98805448 A CN 98805448A CN 98805448 A CN98805448 A CN 98805448A CN 1257599 A CN1257599 A CN 1257599A
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contact
carrier
electronic package
card
microcircuit
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CN1183486C (zh
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M·扎弗拉涅
P·帕特里斯
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Gemplus SA
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Gemplus SCA
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    • H01L24/25Structure, shape, material or disposition of the high density interconnect connectors after the connecting process of a plurality of high density interconnect connectors
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06KGRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
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Abstract

本发明涉及一种电子组件,尤其是用于安装在一个卡形式的电子装置中的电子组件,包括至少在其一面(44)上设有触点(46;48;50)的载体(40),及一个微电路(56),该微电路安装在所述载体(40)上并包括各与载体-触点相连接的输出接点(60,62)。本发明的特征是,在输出接点与触点之间的连接部分(66,68)是由贴合在载体凸起部分上的粘性导电材料作的束带形成的。有利的是,该导电材料是一种各向同性的导电胶。

Description

用于芯片卡的电子组件
本发明涉及电子组件,尤其是用于安装在一个卡形式的电子装置中的电子组件,它包括至少在其一面上设有触点的载体,及一个微电路,该微电路安装在所述载体上并包括各与载体的一个触点相连接的输出接点。
这种卡形式的装置尤其包括集成电路卡、也称芯片卡,以及用于电视、磁性记录等的电子单元载体。
芯片卡由卡体及组件构成,组件包括芯片并组合在卡体中。
芯片卡组件包括一个载体,载体通常由环氧树脂玻璃作成,在其一面上金属化以形成触点金属迹,及在载体的另一面上粘接一个芯片,而芯片包括在其外表面上的输出接点。设有穿过载体的连接孔以便使将一个输出接点与一个触点相连接的连接导线穿过。
使用不同的工艺如超声波或热压焊将不氧化的金属作成的连接线、如金或铝线焊接,在连接线外面需要借助一种树脂的涂层(“glob top”)对其保护。有时也需要预先在载体上固定一个树脂的保持层,如金属或硅作的环。
树脂体以非控制的方式沉积,当它聚合时,它形成了一个很厚的滴块,其厚度超过芯片卡的规定高度。因此需要进行铣切加工,以使组件厚度减小到所需值上。该铣切加工会损坏组件,它是产品报废的主要原因。
在芯片卡体内,设置了一个凹腔来接收组件,并且该凹腔应相对地深以便接收一个相当高的组件。这使得卡体在凹腔处的厚度变薄,当芯片卡受到弯曲时,将引起卡体的严重变形,这就限制了卡的可靠性及卡的寿命。
此外,该树脂滴的聚合会引起组件膨胀现象。
该膨胀可导致芯片卡阅读器的损坏。
本发明的目的是提供一种降低了高度的电子组件,以便克服上述缺点。
根据本发明的电子组件的主要特征在于:在输出接点与触点之间的连接是由粘性的导体材料束带形成的,该束带贴合在载体的凸起部分上。
这种连接不需要保护涂层,它能显著地降低组件高度。其结果是使制造简化,尤其是,可去消铣切加工,这就极大地降低了产品的废品率。
有利的是,导电材料是一种各向同性的导电胶。
也可以使用通过网板印刷沉积的金属。
在载体包括连接孔的情况下,这些孔被导电材料填充。
载体可包括设有触点的两个面,连接可直接地在两个面上实现,而不用使用连接孔。
有利地,其中载体的一个面被一种可活化的胶膜覆盖。
这是对微电路的一种附加保护并能够简化组件在卡体中的固定操作。
微电路的输出接点可具有连接凸块,以减小接触电阻。
本发明的目的还在于制造一种电子组件的方法,其特征是,束带是通过沉积粘性导电材料来实现的。
这种借助喷射器或类似装置的沉积技术速度快且易于实施。
本发明的目的也在于一种芯片卡,其特征是,它至少包括一个上述类型的电子组件。
在阅读了以下的详细说明时本发明的另外特征及优点将会显现,而为了理解它们需参照附图,其附图为:
-图1是以横截面表示的一个公知类型的电子组件的示图;
-图2表示根据本发明的电子组件;
-图3是其中载体包括设有触点的两个面的组件实施方式的顶视图。
图1表示一个公知类型的电子组件。它包括一个载体10,例如由环氧树脂玻璃作成。其中一个面12包括用金属化制成的触点14。另一面16包括一个用于固定微电路20的下侧面的胶层18,微电路的自由上侧面上设有输出接点22。
输出接点22及触点14之间的连接是通过金属导线24的焊接来实现的,每个金属导线穿过作在载体10中的连接孔26。在导线24焊接操作后,它们被涂上可聚合的树脂,后者形成一个滴块28,该滴块则被硅做的外围环30保持住。
该滑块28是以非控制方式施加的并具有可观的厚度,这显著地增加了组件的高度,因此必须使用机加工,如铣削使其上部分变平,如,由虚线32所示。
正如以上指示的,该滴块28的出现将降低在接收组件的凹腔处芯片卡的机械强度,以使得在该处卡的机械强度不足,及此外,在该处卡可能出现膨胀。
图2表示一个根据本发明的电子组件。载体40包括连接孔42。载体40的下侧面44被金属化并包括触点46,48及50。载体40的上侧面52具有一个用于固定芯片56的胶层54,该芯片在其上侧面58上包括输出接点60及62,它们可设有未示出的接触凸块(bumps)。在芯片56的四周,芯片附近的载体面52上及连接孔42中涂以绝缘胶保护层64。
根据本发明,输出接点60及62和触点46及50之间的连接部分66及68是由粘性导电材料的束带构成的,它们贴合在载体的凸起部分上,更具体地,它们与胶层64接触,及它们的端部与输出接点及相交的触点相接触。该材料在粘性状态下施加。
该材料、譬如一种各向同性的导电胶的施加是通过称为“散布”(“dispense”)的沉积技术来实现的,根据该技术,将借助带有可控流量及孔径的喷射器或类似装置施加液体或低粘度的材料。
该“散布”操作譬如可使用商业上可得到的称为CAM/ALOT的设备来实现,该设备由美国公司“Camelot Systems Inc.”制造并用于电子电路的批量生产。喷射器的移动及孔径受到到计算机程序的控制。
这些连接也可使用网板印刷沉积金属来实现。
为了改善电接触,输出接点可包括接触凸块及导电材料束带的端部将与这些接触凸块接触。
本发明也可用于载体包含两个带有触点的金属化面的情况。
这种情况表示在图3中,它是一个组件的部分顶视图,其中可看到一个芯片70及其输出接点72,74,76,78和80。接点72,74及76被连接到载体下侧面的触点上,而接点78及80也分别通过粘性导电材料束带86,88连接到载体上侧面的触点82,84上。
根据本发明的电子组件可覆盖一层可活化胶膜,例如通过加热或紫外射线活化,一方面,以便增强对芯片的保护,另一方面,简化组件在卡体凹腔中的固定操作。
根据本发明的直接连接实施方式可应用于所有卡形式的电子装置的制造,例如视频装置或家用电器的控制卡的制造。
可以看出,本发明可去除连接部分的涂层,因此减小了该组件的厚度。
此外,作为导电材料使用的树脂是非常柔软的,这就增强了组件的可靠性。
与连接部分涂层相关的操作,即放置保持阻挡层如硅环,沉积涂层树脂及机加工树脂滴块,均可去除。其结果是简化了制造及降低了制造成本。
本发明允许在组件处的卡体厚度作得相当厚,因此可增加卡的机械强度。
由于本发明,可降低在微电路平面中组件的尺寸,并允许使用两个相邻的组件流水线批量地生产组件。
最后,本发明能够消除卡膨胀现象,因此可避免阅读器的损坏。

Claims (7)

1.电子组件(94),尤其是用于安装在一个卡形式的电子装置中的电子组件,包括至少在其一面(12;44)上设有触点(14;46;48;50)的载体(10;40;108)及一个微电路(20;56;70;98),该微电路安装在所述载体(10;40;108)上并包括各与载体的一个触点相连接的输出接点(22;60,62;72,74,76,78,80),其特征在于:在输出接点与触点之间的连接部分(66,68;86,88)是由贴合在载体凸起部分上的粘性导电材料束带形成的。
2.根据权利要求1的电子组件的制造方法,其特征在于:该束带是通过沉积粘性导体材料来实现的。
3.根据权利要求1的电子组件,其特征在于:导电材料是一种各向同性的导电胶。
4.根据权利要求1至3中任一项的电子组件,其特征在于:载体包括设有触点的两个面。
5.根据权利要求1至4中任一项的电子组件,其特征在于:组件的一个面上覆盖了一层可活化胶膜。
6.根据权利要求1至5中任一项的电子组件,其特征在于:微电路的输出接点包括连接凸块。
7.芯片卡,其特征在于:它至少包括一个根据权利要求1至6中任一项的电子组件。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103579153A (zh) * 2012-07-19 2014-02-12 英飞凌科技股份有限公司 芯片卡模块

Families Citing this family (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2761498B1 (fr) * 1997-03-27 1999-06-18 Gemplus Card Int Module electronique et son procede de fabrication et carte a puce comportant un tel module
FR2785072B1 (fr) * 1998-10-23 2001-01-19 St Microelectronics Sa Circuit electronique autocollant
FR2797075B1 (fr) * 1999-07-26 2001-10-12 Gemplus Card Int Procede de fabrication de dispositif portable a circuits integres, de type carte a puce de format reduit par rapport au format standard
FR2797995B1 (fr) * 1999-08-25 2002-03-22 Gemplus Card Int Procede de protection de puces de circuit integre par depot de couche mince isolante
FR2797996B1 (fr) * 1999-08-25 2003-10-03 Gemplus Card Int Procede de protection de puces de circuit integre par depot de couche mince isolante
FR2799306B1 (fr) * 1999-10-04 2003-09-19 Gemplus Card Int Procede d'isolation de puce de circuit integre par depot de matiere sur la face active
FR2800198B1 (fr) * 1999-10-26 2002-03-29 Gemplus Card Int Procede de protection de puces de circuit integre par aspiration sous vide
FR2808920B1 (fr) * 2000-05-10 2003-10-03 Gemplus Card Int Procede de protection de puces de circuit integre
FR2818800B1 (fr) * 2000-12-21 2003-04-04 Gemplus Card Int Interconnexion par organe deformable pour dispositif electronique
FR2818801B1 (fr) * 2000-12-21 2003-04-04 Gemplus Card Int Interconnexion par organe d'isolation decoupe et cordon de conduction
FR2823011B1 (fr) * 2001-03-30 2004-11-19 Gemplus Card Int Connexion par depot de cordon conductrice sur zone de raccordement delimitee par masque isolant
FR2845805B1 (fr) * 2002-10-10 2005-06-03 Gemplus Card Int Adhesif d'encartage formant navette
FR2847365B1 (fr) * 2002-11-15 2005-03-11 Gemplus Card Int Connexion/raccordement simultane par un percage d'adhesif d'encartage
US7243421B2 (en) * 2003-10-29 2007-07-17 Conductive Inkjet Technology Limited Electrical connection of components
WO2007042071A1 (de) * 2005-10-10 2007-04-19 Alphasem Ag Baugruppe mit wenigstens zwei in elektrisch leitender wirkverbindung stehenden komponenten und verfahren zum herstellen der baugruppe
DE102006056361B4 (de) * 2006-11-29 2012-08-16 Infineon Technologies Ag Modul mit polymerhaltigem elektrischen Verbindungselement und Verfahren
DE102008019571A1 (de) 2008-04-18 2009-10-22 Giesecke & Devrient Gmbh Chipkarte und Verfahren zu deren Herstellung
TWM425346U (en) * 2011-05-20 2012-03-21 Mxtran Inc Integrated circuit film for smart card and mobile communication device
MY184608A (en) * 2013-12-10 2021-04-07 Carsem M Sdn Bhd Pre-molded integrated circuit packages
DE102014105861B4 (de) * 2014-04-25 2015-11-05 Infineon Technologies Ag Sensorvorrichtung und Verfahren zum Herstellen einer Sensorvorrichtung

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3338597A1 (de) * 1983-10-24 1985-05-02 GAO Gesellschaft für Automation und Organisation mbH, 8000 München Datentraeger mit integriertem schaltkreis und verfahren zur herstellung desselben
US4999136A (en) * 1988-08-23 1991-03-12 Westinghouse Electric Corp. Ultraviolet curable conductive resin
US5255430A (en) * 1992-10-08 1993-10-26 Atmel Corporation Method of assembling a module for a smart card
DE4325458A1 (de) * 1993-07-29 1995-02-09 Orga Bond Technik Gmbh Trägerelement für einen IC-Baustein
US5689136A (en) * 1993-08-04 1997-11-18 Hitachi, Ltd. Semiconductor device and fabrication method
DE9315652U1 (de) * 1993-10-15 1993-12-23 Nordson Corp., Westlake, Ohio Auftragskopf zum Aufbringen von Klebstoff auf ein Substrat, insbesondere für eine Verklebung eines Chips mit einer Karte
US5423889A (en) * 1994-06-24 1995-06-13 Harris Corporation Process for manufacturing a multi-port adhesive dispensing tool
JPH0839974A (ja) * 1994-07-27 1996-02-13 Dainippon Printing Co Ltd Icカード用icモジュールとその製造方法、及びicカード
DE4441052A1 (de) * 1994-11-18 1996-05-23 Orga Kartensysteme Gmbh Trägerelement für einen IC-Baustein zum Einsatz in Chipkarten
EP0734059B1 (en) * 1995-03-24 2005-11-09 Shinko Electric Industries Co., Ltd. Chip sized semiconductor device and a process for making it
JPH08310172A (ja) * 1995-05-23 1996-11-26 Hitachi Ltd 半導体装置
FR2761498B1 (fr) * 1997-03-27 1999-06-18 Gemplus Card Int Module electronique et son procede de fabrication et carte a puce comportant un tel module
US6107109A (en) * 1997-12-18 2000-08-22 Micron Technology, Inc. Method for fabricating a semiconductor interconnect with laser machined electrical paths through substrate

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103579153A (zh) * 2012-07-19 2014-02-12 英飞凌科技股份有限公司 芯片卡模块

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US6435414B1 (en) 2002-08-20
DE69832104T2 (de) 2006-11-23
JP2002511188A (ja) 2002-04-09
RU2200975C2 (ru) 2003-03-20
WO1998044451A1 (fr) 1998-10-08
FR2761498B1 (fr) 1999-06-18
AU6922598A (en) 1998-10-22
CN1183486C (zh) 2005-01-05
AU720691B2 (en) 2000-06-08
EP0970437A1 (fr) 2000-01-12
HK1028833A1 (en) 2001-03-02
DE69832104D1 (de) 2005-12-01
BR9808062A (pt) 2000-03-08
EP1168240B1 (fr) 2005-10-26
JP3869860B2 (ja) 2007-01-17
FR2761498A1 (fr) 1998-10-02
US6769619B2 (en) 2004-08-03
EP1168240A2 (fr) 2002-01-02
EP1168240A3 (fr) 2002-01-30
US20020125329A1 (en) 2002-09-12
CA2283692A1 (fr) 1998-10-08

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