FR2797996B1 - Procede de protection de puces de circuit integre par depot de couche mince isolante - Google Patents

Procede de protection de puces de circuit integre par depot de couche mince isolante

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Publication number
FR2797996B1
FR2797996B1 FR0002351A FR0002351A FR2797996B1 FR 2797996 B1 FR2797996 B1 FR 2797996B1 FR 0002351 A FR0002351 A FR 0002351A FR 0002351 A FR0002351 A FR 0002351A FR 2797996 B1 FR2797996 B1 FR 2797996B1
Authority
FR
France
Prior art keywords
thin film
integrated circuit
film deposition
circuit chips
insulating thin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0002351A
Other languages
English (en)
Other versions
FR2797996A1 (fr
Inventor
Philippe Patrice
Michel Papapietro
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Gemplus SA
Original Assignee
Gemplus Card International SA
Gemplus SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from FR9910785A external-priority patent/FR2797995B1/fr
Application filed by Gemplus Card International SA, Gemplus SA filed Critical Gemplus Card International SA
Priority to FR0002351A priority Critical patent/FR2797996B1/fr
Priority to AU70146/00A priority patent/AU7014600A/en
Priority to PCT/FR2000/002344 priority patent/WO2001015224A1/fr
Publication of FR2797996A1 publication Critical patent/FR2797996A1/fr
Application granted granted Critical
Publication of FR2797996B1 publication Critical patent/FR2797996B1/fr
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Condensed Matter Physics & Semiconductors (AREA)
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  • Optics & Photonics (AREA)
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  • Formation Of Insulating Films (AREA)
FR0002351A 1999-08-25 2000-02-24 Procede de protection de puces de circuit integre par depot de couche mince isolante Expired - Lifetime FR2797996B1 (fr)

Priority Applications (3)

Application Number Priority Date Filing Date Title
FR0002351A FR2797996B1 (fr) 1999-08-25 2000-02-24 Procede de protection de puces de circuit integre par depot de couche mince isolante
AU70146/00A AU7014600A (en) 1999-08-25 2000-08-18 Method for protecting integrated circuit chips by depositing a thin insulation layer
PCT/FR2000/002344 WO2001015224A1 (fr) 1999-08-25 2000-08-18 Procede de protection de puces de circuit integre par depot de couche mince isolante

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR9910785A FR2797995B1 (fr) 1999-08-25 1999-08-25 Procede de protection de puces de circuit integre par depot de couche mince isolante
FR0002351A FR2797996B1 (fr) 1999-08-25 2000-02-24 Procede de protection de puces de circuit integre par depot de couche mince isolante

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FR2797996A1 FR2797996A1 (fr) 2001-03-02
FR2797996B1 true FR2797996B1 (fr) 2003-10-03

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AU (1) AU7014600A (fr)
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WO (1) WO2001015224A1 (fr)

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US20240194623A1 (en) * 2021-04-22 2024-06-13 Tdk Electronics Ag Metallized semiconductor die and manufacturing method

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GB1553243A (en) * 1975-08-04 1979-09-26 Gen Electric Semiconductor
JPS5272572A (en) * 1975-12-15 1977-06-17 Seiko Epson Corp Semiconductor device
DE2840776A1 (de) * 1978-09-19 1980-03-27 Siemens Ag Halbleiterbauelement mit passivierender schutzschicht
JPS58125886A (ja) * 1982-01-22 1983-07-27 Hitachi Ltd 半導体装置の製造方法
US5270260A (en) * 1990-08-23 1993-12-14 Siemens Aktiengesellschaft Method and apparatus for connecting a semiconductor chip to a carrier system
JPH06222388A (ja) * 1993-01-28 1994-08-12 Fujitsu Ltd 薄膜トランジスタマトリックスの製造方法
JPH06230421A (ja) * 1993-02-02 1994-08-19 Fujitsu Ltd 薄膜トランジスタマトリクスの製造方法
US5926689A (en) * 1995-12-19 1999-07-20 International Business Machines Corporation Process for reducing circuit damage during PECVD in single wafer PECVD system
FR2761498B1 (fr) * 1997-03-27 1999-06-18 Gemplus Card Int Module electronique et son procede de fabrication et carte a puce comportant un tel module

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FR2797996A1 (fr) 2001-03-02
WO2001015224A1 (fr) 2001-03-01
AU7014600A (en) 2001-03-19

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