DE69939684D1 - Mit esd-schutz ausgestatteter integrierter schaltkreis - Google Patents

Mit esd-schutz ausgestatteter integrierter schaltkreis

Info

Publication number
DE69939684D1
DE69939684D1 DE69939684T DE69939684T DE69939684D1 DE 69939684 D1 DE69939684 D1 DE 69939684D1 DE 69939684 T DE69939684 T DE 69939684T DE 69939684 T DE69939684 T DE 69939684T DE 69939684 D1 DE69939684 D1 DE 69939684D1
Authority
DE
Germany
Prior art keywords
integrated circuit
esd protected
protected integrated
esd
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69939684T
Other languages
English (en)
Inventor
Hans U Schroeder
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP BV
Original Assignee
NXP BV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NXP BV filed Critical NXP BV
Application granted granted Critical
Publication of DE69939684D1 publication Critical patent/DE69939684D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0259—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using bipolar transistors as protective elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69939684T 1998-08-04 1999-07-29 Mit esd-schutz ausgestatteter integrierter schaltkreis Expired - Fee Related DE69939684D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP98202623 1998-08-04
PCT/EP1999/005517 WO2000008688A1 (en) 1998-08-04 1999-07-29 An integrated circuit provided with esd protection means

Publications (1)

Publication Number Publication Date
DE69939684D1 true DE69939684D1 (de) 2008-11-20

Family

ID=8234006

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69939684T Expired - Fee Related DE69939684D1 (de) 1998-08-04 1999-07-29 Mit esd-schutz ausgestatteter integrierter schaltkreis

Country Status (5)

Country Link
US (1) US6215135B1 (de)
EP (1) EP1046193B1 (de)
JP (1) JP2002522906A (de)
DE (1) DE69939684D1 (de)
WO (1) WO2000008688A1 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW457689B (en) * 2000-01-11 2001-10-01 Winbond Electronics Corp High current ESD protection circuit
DE10005811A1 (de) * 2000-02-10 2001-08-23 Micronas Gmbh Laterale Thyristorstruktur zum Schutz vor elektrostatischer Entladung
EP1323195A1 (de) * 2000-09-22 2003-07-02 Siemens Aktiengesellschaft Elektrode und/oder leiterbahn für organische bauelemente und herstellungsverfahren dazu
DE10111462A1 (de) 2001-03-09 2002-09-19 Infineon Technologies Ag Thyristorstruktur und Überspannungsschutzanordnung mit einer solchen Thyristorstruktur
US20030042498A1 (en) * 2001-08-30 2003-03-06 Ming-Dou Ker Method of forming a substrate-triggered SCR device in CMOS technology
US20040121474A1 (en) * 2002-12-19 2004-06-24 Genoptix, Inc Detection and evaluation of chemically-mediated and ligand-mediated t-cell activation using optophoretic analysis
US20050045952A1 (en) * 2003-08-27 2005-03-03 International Business Machines Corporation Pfet-based esd protection strategy for improved external latch-up robustness
TWI227052B (en) * 2003-12-23 2005-01-21 Macronix Int Co Ltd ESD protection circuit for dual-polarity input pad
KR100629436B1 (ko) * 2004-09-08 2006-09-27 매그나칩 반도체 유한회사 고전압 소자의 정전기 보호장치
US8010927B2 (en) * 2007-10-02 2011-08-30 International Business Machines Corporation Structure for a stacked power clamp having a BigFET gate pull-up circuit
TWI349368B (en) * 2008-01-24 2011-09-21 Raydium Semiconductor Corp Dual triggered silicon controlled rectifier
CN101521224B (zh) * 2008-02-27 2010-07-14 瑞鼎科技股份有限公司 双触发型可控硅整流器
US8198651B2 (en) 2008-10-13 2012-06-12 Infineon Technologies Ag Electro static discharge protection device
US8102002B2 (en) * 2008-12-16 2012-01-24 Analog Devices, Inc. System and method for isolated NMOS-based ESD clamp cell
JP5540801B2 (ja) 2010-03-19 2014-07-02 富士通セミコンダクター株式会社 Ｅｓｄ保護回路及び半導体装置
TWI416706B (zh) * 2010-12-20 2013-11-21 Univ Nat Chiao Tung 三維積體電路的靜電放電防護結構
CN114582866A (zh) * 2020-11-30 2022-06-03 三星电子株式会社 半导体器件
CN113782528B (zh) * 2021-11-11 2022-02-08 北京芯可鉴科技有限公司 半导体器件、集成电路产品以及制造方法

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04230072A (ja) * 1990-12-27 1992-08-19 Toshiba Corp 半導体集積回路の保護回路
US5400202A (en) * 1992-06-15 1995-03-21 Hewlett-Packard Company Electrostatic discharge protection circuit for integrated circuits
WO1994003928A1 (en) * 1992-08-06 1994-02-17 Harris Corporation High voltage protection using scrs
US5455436A (en) * 1994-05-19 1995-10-03 Industrial Technology Research Institute Protection circuit against electrostatic discharge using SCR structure
US5576557A (en) * 1995-04-14 1996-11-19 United Microelectronics Corp. Complementary LVTSCR ESD protection circuit for sub-micron CMOS integrated circuits
US5615073A (en) * 1995-06-22 1997-03-25 National Semiconductor Corporation Electrostatic discharge protection apparatus
KR100402337B1 (ko) * 1995-10-31 2004-01-28 텍사스 인스트루먼츠 인코포레이티드 Dram및로직회로용의scr및dram전원용의바이모덜esd보호회로
US5744840A (en) * 1995-11-20 1998-04-28 Ng; Kwok Kwok Electrostatic protection devices for protecting semiconductor integrated circuitry
KR100190008B1 (ko) * 1995-12-30 1999-06-01 윤종용 반도체 장치의 정전하 보호 장치
US5739998A (en) * 1996-07-12 1998-04-14 Kabushiki Kaisha Toshiba Protective circuit and semiconductor integrated circuit incorporating protective circuit
US6081002A (en) * 1997-05-29 2000-06-27 Texas Instruments Incorporated Lateral SCR structure for ESD protection in trench isolated technologies
JPH1140686A (ja) * 1997-07-23 1999-02-12 Rohm Co Ltd 半導体集積回路装置

Also Published As

Publication number Publication date
WO2000008688A1 (en) 2000-02-17
EP1046193B1 (de) 2008-10-08
US6215135B1 (en) 2001-04-10
EP1046193A1 (de) 2000-10-25
JP2002522906A (ja) 2002-07-23

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee