CN1224234A - 腐蚀硅层的方法 - Google Patents
腐蚀硅层的方法 Download PDFInfo
- Publication number
- CN1224234A CN1224234A CN99100182A CN99100182A CN1224234A CN 1224234 A CN1224234 A CN 1224234A CN 99100182 A CN99100182 A CN 99100182A CN 99100182 A CN99100182 A CN 99100182A CN 1224234 A CN1224234 A CN 1224234A
- Authority
- CN
- China
- Prior art keywords
- silicon layer
- corrosion
- layer
- film
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/3065—Plasma etching; Reactive-ion etching
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32136—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas
- H01L21/32137—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only using plasmas of silicon-containing layers
Abstract
Description
Claims (6)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP007082/1998 | 1998-01-16 | ||
JP00708298A JP3252780B2 (ja) | 1998-01-16 | 1998-01-16 | シリコン層のエッチング方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
CN1224234A true CN1224234A (zh) | 1999-07-28 |
CN1110843C CN1110843C (zh) | 2003-06-04 |
Family
ID=11656179
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN99100182A Expired - Fee Related CN1110843C (zh) | 1998-01-16 | 1999-01-15 | 腐蚀硅层的方法 |
Country Status (6)
Country | Link |
---|---|
US (1) | US6376383B2 (zh) |
JP (1) | JP3252780B2 (zh) |
KR (1) | KR100278464B1 (zh) |
CN (1) | CN1110843C (zh) |
GB (1) | GB2333267B (zh) |
TW (1) | TW419740B (zh) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7314792B2 (en) | 2005-04-29 | 2008-01-01 | Hynix Semiconductor Inc. | Method for fabricating transistor of semiconductor device |
CN101174563B (zh) * | 2006-10-30 | 2010-06-02 | 海力士半导体有限公司 | 制造具有凹陷栅极的半导体器件的方法 |
US7858476B2 (en) | 2006-10-30 | 2010-12-28 | Hynix Semiconductor Inc. | Method for fabricating semiconductor device with recess gate |
CN103903978A (zh) * | 2012-12-27 | 2014-07-02 | 南亚科技股份有限公司 | 蚀刻方法 |
Families Citing this family (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE19910886B4 (de) * | 1999-03-11 | 2008-08-14 | Infineon Technologies Ag | Verfahren zur Herstellung einer flachen Grabenisolation für elektrisch aktive Bauelemente |
US6391788B1 (en) | 2000-02-25 | 2002-05-21 | Applied Materials, Inc. | Two etchant etch method |
US6989108B2 (en) * | 2001-08-30 | 2006-01-24 | Micron Technology, Inc. | Etchant gas composition |
KR100415088B1 (ko) * | 2001-10-15 | 2004-01-13 | 주식회사 하이닉스반도체 | 반도체장치의 제조방법 |
KR100842902B1 (ko) * | 2002-06-29 | 2008-07-02 | 주식회사 하이닉스반도체 | 반도체 소자의 분리 방법 |
KR100457046B1 (ko) * | 2002-08-07 | 2004-11-10 | 삼성전자주식회사 | 반도체 장치의 제조에서 콘택 형성 방법 |
KR100486660B1 (ko) * | 2002-09-05 | 2005-05-03 | 동부아남반도체 주식회사 | 반도체 소자의 연마 방법 |
CN1309867C (zh) * | 2004-07-19 | 2007-04-11 | 北京北方微电子基地设备工艺研究中心有限责任公司 | 减小微沟道效应的多晶硅刻蚀工艺 |
JP4312143B2 (ja) | 2004-10-29 | 2009-08-12 | 富士通株式会社 | ルール発見プログラム、ルール発見方法およびルール発見装置 |
WO2006081426A2 (en) * | 2005-01-28 | 2006-08-03 | Applera Corporation | Compositions and methods for terminating a sequencing reaction at a specific location in a target dna template |
US20070202701A1 (en) * | 2006-02-27 | 2007-08-30 | Tokyo Electron Limited | Plasma etching apparatus and method |
WO2008039461A2 (en) * | 2006-09-27 | 2008-04-03 | Thinsilicon Corp. | Back contact device for photovoltaic cells and method of manufacturing a back contact |
WO2008150769A2 (en) * | 2007-05-31 | 2008-12-11 | Thinsilicon Corporation | Photovoltaic device and method of manufacturing photovoltaic devices |
CN102165604A (zh) * | 2008-09-29 | 2011-08-24 | 薄膜硅公司 | 单片集成太阳能电池组件 |
JP2010113270A (ja) * | 2008-11-10 | 2010-05-20 | Toppan Printing Co Ltd | 微小立体構造の製造方法及びそれに用いる露光用マスク |
US8444766B2 (en) * | 2008-12-10 | 2013-05-21 | Thinsilicon Corporation | System and method for recycling a gas used to deposit a semiconductor layer |
WO2010129163A2 (en) * | 2009-05-06 | 2010-11-11 | Thinsilicon Corporation | Photovoltaic cells and methods to enhance light trapping in semiconductor layer stacks |
KR102223145B1 (ko) | 2014-07-04 | 2021-03-05 | 삼성디스플레이 주식회사 | 박막 트랜지스터 기판, 이를 갖는 액정 표시 패널 및 이의 제조방법 |
CN112289676B (zh) * | 2020-03-11 | 2023-06-13 | 深圳方正微电子有限公司 | 一种去除半导体器件制造中的多晶硅残留的方法 |
Family Cites Families (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5690525A (en) * | 1979-11-28 | 1981-07-22 | Fujitsu Ltd | Manufacture of semiconductor device |
JPS57170535A (en) | 1981-04-15 | 1982-10-20 | Toshiba Corp | Etching method for thin silicon film |
US4389294A (en) * | 1981-06-30 | 1983-06-21 | International Business Machines Corporation | Method for avoiding residue on a vertical walled mesa |
JPS5817619A (ja) | 1981-07-23 | 1983-02-01 | Toshiba Corp | パタ−ン形成方法 |
US4656497A (en) * | 1984-11-01 | 1987-04-07 | Ncr Corporation | Trench isolation structures |
US5338398A (en) * | 1991-03-28 | 1994-08-16 | Applied Materials, Inc. | Tungsten silicide etch process selective to photoresist and oxide |
JP3024317B2 (ja) * | 1991-10-25 | 2000-03-21 | 日本電気株式会社 | 半導体装置の製造方法 |
JP2758771B2 (ja) | 1992-03-11 | 1998-05-28 | シャープ株式会社 | 素子分離領域の形成方法 |
JP3161040B2 (ja) * | 1992-06-16 | 2001-04-25 | ソニー株式会社 | 半導体装置の製造方法 |
JP3124204B2 (ja) * | 1994-02-28 | 2001-01-15 | 株式会社東芝 | プラズマ処理装置 |
JPH08262489A (ja) | 1995-03-24 | 1996-10-11 | Sony Corp | 半導体装置及び半導体装置の製造方法 |
JPH08274078A (ja) | 1995-03-31 | 1996-10-18 | Ricoh Co Ltd | エッチング方法 |
US5767018A (en) * | 1995-11-08 | 1998-06-16 | Advanced Micro Devices, Inc. | Method of etching a polysilicon pattern |
JPH09266197A (ja) | 1996-03-28 | 1997-10-07 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
KR100230981B1 (ko) * | 1996-05-08 | 1999-11-15 | 김광호 | 반도체장치 제조공정의 플라즈마 식각 방법 |
US5706164A (en) * | 1996-07-17 | 1998-01-06 | Vangaurd International Semiconductor Corporation | Method of fabricating high density integrated circuits, containing stacked capacitor DRAM devices, using elevated trench isolation and isolation spacers |
JP2956602B2 (ja) * | 1996-08-26 | 1999-10-04 | 日本電気株式会社 | ドライエッチング方法 |
JPH10177992A (ja) * | 1996-12-16 | 1998-06-30 | Sharp Corp | 微細コンタクトホールのテーパエッチング方法 |
US5933759A (en) * | 1996-12-31 | 1999-08-03 | Intel Corporation | Method of controlling etch bias with a fixed lithography pattern for sub-micron critical dimension shallow trench applications |
US5882535A (en) * | 1997-02-04 | 1999-03-16 | Micron Technology, Inc. | Method for forming a hole in a semiconductor device |
EP0871213A3 (en) * | 1997-03-27 | 1999-03-03 | Siemens Aktiengesellschaft | Method for producing vias having variable sidewall profile |
US5856239A (en) * | 1997-05-02 | 1999-01-05 | National Semiconductor Corporaton | Tungsten silicide/ tungsten polycide anisotropic dry etch process |
US5801083A (en) * | 1997-10-20 | 1998-09-01 | Chartered Semiconductor Manufacturing, Ltd. | Use of polymer spacers for the fabrication of shallow trench isolation regions with rounded top corners |
US6080680A (en) * | 1997-12-19 | 2000-06-27 | Lam Research Corporation | Method and composition for dry etching in semiconductor fabrication |
-
1998
- 1998-01-16 JP JP00708298A patent/JP3252780B2/ja not_active Expired - Fee Related
-
1999
- 1999-01-15 CN CN99100182A patent/CN1110843C/zh not_active Expired - Fee Related
- 1999-01-15 GB GB9900944A patent/GB2333267B/en not_active Expired - Fee Related
- 1999-01-15 TW TW088100681A patent/TW419740B/zh not_active IP Right Cessation
- 1999-01-15 KR KR1019990001133A patent/KR100278464B1/ko not_active IP Right Cessation
- 1999-01-19 US US09/233,089 patent/US6376383B2/en not_active Expired - Fee Related
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7314792B2 (en) | 2005-04-29 | 2008-01-01 | Hynix Semiconductor Inc. | Method for fabricating transistor of semiconductor device |
CN100407407C (zh) * | 2005-04-29 | 2008-07-30 | 海力士半导体有限公司 | 用于制造半导体装置的晶体管的方法 |
CN101174563B (zh) * | 2006-10-30 | 2010-06-02 | 海力士半导体有限公司 | 制造具有凹陷栅极的半导体器件的方法 |
US7858476B2 (en) | 2006-10-30 | 2010-12-28 | Hynix Semiconductor Inc. | Method for fabricating semiconductor device with recess gate |
CN103903978A (zh) * | 2012-12-27 | 2014-07-02 | 南亚科技股份有限公司 | 蚀刻方法 |
CN103903978B (zh) * | 2012-12-27 | 2016-12-28 | 南亚科技股份有限公司 | 蚀刻方法 |
Also Published As
Publication number | Publication date |
---|---|
KR19990067937A (ko) | 1999-08-25 |
US6376383B2 (en) | 2002-04-23 |
JP3252780B2 (ja) | 2002-02-04 |
CN1110843C (zh) | 2003-06-04 |
TW419740B (en) | 2001-01-21 |
KR100278464B1 (ko) | 2001-01-15 |
GB2333267B (en) | 2000-04-26 |
GB2333267A (en) | 1999-07-21 |
JPH11204504A (ja) | 1999-07-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
C06 | Publication | ||
PB01 | Publication | ||
C14 | Grant of patent or utility model | ||
GR01 | Patent grant | ||
C41 | Transfer of patent application or patent right or utility model | ||
COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: TOKYO, JAPAN TO: KANAGAWA, JAPAN |
|
TR01 | Transfer of patent right |
Effective date of registration: 20100901 Address after: Kanagawa, Japan Patentee after: NEC Corp. Address before: Tokyo, Japan Patentee before: NEC Corp. |
|
ASS | Succession or assignment of patent right |
Owner name: RENESAS ELECTRONICS CO., LTD. Free format text: FORMER OWNER: NEC CORP. Effective date: 20101117 |
|
C41 | Transfer of patent application or patent right or utility model | ||
TR01 | Transfer of patent right |
Effective date of registration: 20101117 Address after: Kanagawa, Japan Patentee after: Renesas Electronics Corporation Address before: Kanagawa, Japan Patentee before: NEC Corp. |
|
C17 | Cessation of patent right | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20030604 Termination date: 20140115 |