CN1146957C - 半导体基材的制造方法 - Google Patents
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Abstract
在通过支撑元件对由基片上的分离层形成的半导体层进行支撑,并通过对支撑元件施加拉力机械破坏分离层,而形成薄膜半导体时,通过真空吸附和/或静电吸附来固定基片,并从除基片边缘之外的区域开始分离薄膜外延层。由此可提供一种能够以较高产量获得具有优异性质薄膜外延层的方法,并且允许重复使用基片,且在制造半导体基材和太阳能电池时不会因为分离力超过基片的粘接力而抬起基片。
Description
技术领域
本发明涉及一种制造半导体基材的方法,更具体地,涉及一种通过在低成本基片上沉积薄膜结晶层来制造太阳能电池的方法。
背景技术
在已知技术中,在半导体基片上形成的多孔层上形成薄膜半导体层,然后通过使切断多孔层从基片上分离薄膜半导体层,并且在分离之后利用半导体基片再一次形成薄膜半导体层。由于这种技术允许有效地利用材料,可以获得质量好且不昂贵的薄膜半导体。可用于分离的方法包括通过腐蚀的化学方法,或利用超声波、拉力或类似作用的物理方法。
已公开的日本专利No.7-302889描述了物理分离方法,其中在硅晶片表面所形成的多孔层上生长外延层,将另一晶片键合到外延层(硅层)上,并且对多孔层加压、剪切、用超声波、或类似作用来实现分离。已公开的日本专利No.8-213645描述了另一方法,其中在单晶硅基片表面所形成的多孔层上外延生长硅层,利用粘合剂将单晶硅基片的背面粘接到夹具上,然后利用粘合剂将外延层粘接到另一个夹具上,然后在这两个夹具之间施加拉力来获得薄膜半导体。已公开的日本专利No.10-189924和No.10-190029描述了通过真空吸附装置(卡盘或空吸)将单晶硅基片的背面固定到夹具上,将另一个夹具与外延层粘接,并且将两个夹具相互分离以使多孔层断裂,从而获得薄膜外延层(以及用它的太阳能电池)的方法。
对于通过施加拉力从原始半导体基片上分离薄膜外延层,基片的固定是一个重要的因素。为以低成本获得薄膜半导体,必须重复使用原始半导体基片许多次。因此,正如在已公开的日本专利No.10-189924中所描述的那样,认为真空吸附和/或静电吸附是用来固定半导体基片又不会损坏或污染该基片的合适方法。但是,在从基片的边缘开始拉伸同时通过真空吸附和/或静电吸附固定的方法中,当多孔层的断裂强度比确定的值大时,就存在通过多孔层断裂所需要的力来消除基片吸引力的可能,该所需要的力是用于分离薄膜半导体层的拉力,以用来抬起基片。若通过围绕滚筒向上滚动薄膜半导体的固定元件以分离晶体,则存在折断晶片的可能性。
发明内容
本发明的目的是解决上述问题,以提供一种能以较高产量获得具有优异性质薄膜外延层的方法,该方法不用抬起基片并且允许重复使用基片。
为解决上述问题,发明人进行了细致和广泛的研究,并且最终完成本发明。
根据本发明,提供一种制造半导体基材的方法,该方法包括下列步骤:在单晶硅晶片的表面上通过阳极化形成多孔层;在所述多孔层上外延生长半导体层;除去部分半导体层和多孔层;通过支撑元件支撑通过基片上的多孔层形成的半导体层;固定基片;此后对支撑元件施加拉力,机械破坏多孔层以形成薄膜半导体;其中,在施加拉力的步骤中,从基片中除边缘之外的区域开始分离。
附图说明
图1A、1B、1C、1D、1E、1F、1G、和1H是表示根据本发明薄膜半导体制造过程示例的步骤图,根据本发明的方法包括图1A、1B、1C、1D、1E、1F、1G、和1H的步骤;
图2A和2B是表示分离开始上所施加力的分配图,其中图2A表示通过在基片边缘的多孔层分离薄膜半导体层的例子,并且图2B表示通过在基片中心部分的多孔层分离薄膜半导体层的例子;
图3A和3B是用于说明例子1中的工作图,其中图3A是平面图,图3B是剖面图;
图4A和4B是用于说明例子2中的工作图,其中图4A是平面图,图4B是剖面图;
图5A和5B是用于说明示例3中的工作图,其中图5A是平面图,图5B是剖面图。
现在,参照图1A到5B描述本发明的优选实施例,其中相同的元件用相同的附图标记表示。
具体实施方式
首先参照图1A到1H描述半导体基材的制造方法,作为本发明的一个实施例。通过,例如热扩散、离子注入、制备晶片时的污染、或类似的方法将杂质引入到单晶硅晶片101的表面,至少在晶片表面形成p+(或n+)层102(图1A)。
然后将已引入杂质的晶片表面在例如HF的溶液中进行阳极化处理。这将使表面区域多孔化,因而形成多孔层103(图1B)。然后通过液相外延,在多孔层103表面上生长包括单晶硅的外延层(以下将称为单晶硅层)104(图1C)。
在通过阳极化处理形成多孔层期间,可以改变阳极化电流,例如在低电位到高电位的中间部位预先提供密度有差别的多孔层结构,因而便于在生长外延层之后,通过多孔层103从硅晶片101分离单晶硅层104。
然后由支撑元件106通过粘合剂105对在多孔层103上生长的单晶硅层104进行支撑(图1E)。然后使多孔层103断裂以分离单晶硅层104(图1F和1G)。为了可以重复利用硅晶片,通过对与单晶硅层一侧相反的侧表面进行真空吸附来固定硅晶片,并且从除基片周围之外的区域开始分离,例如从基片的中心开始(图1D)。
当从基片的边缘开始分离(图2A)和从基片的中心开始分离(图2B)时,要考虑如图所示,作用在起始点S周围区域的垂直方向上的分离力Fp和固定力Fv。在图中,附图标记207表示固定基片的基底,附图标记208表示真空吸附孔。从图中可明显看出,当从边缘开始分离时,固定力Fv仅对初始点S周围区域的晶片侧面中心作用。另一方面,当从中心开始分离时,均匀的固定力Fv对初始点S周围的区域作用,也能产生较强的固定力。因此,即使在因从晶片边缘分离导致抬起晶片的固定条件下,通过从除边缘之外的区域开始分离,也可以牢固地固定晶片而不抬起。
在从除边缘之外的区域分离晶片时,如果至少在分离开始部分,预先移走部分硅层,就可以从想要的位置平滑地开始分离。例如,当沿晶片的直径方向移走半导体层时,就将分离层分为两个区域(图1D)。首先,在一个区域上使用粘合剂并且在该处粘接支撑元件(图1E)。然后沿直径从该处使该区域向晶片边缘(图中的右边)与移走硅层的部分分离(图1F)。此后,其它的剩余区域也以相似的方式从晶片上分离,以获得薄膜硅层(图1G)。
当根据需要移走多孔层103的残余物之后,这样分离的硅层104被用于半导体基材或太阳能电池。
对于完成分离之后的硅晶片101,将残留在其表面上的多孔层103的残余物通过腐蚀等移走或处理,然后将得到的晶片返回到第一步,从而其可以被有效地利用(图1H)。因此,优选地采用不会损坏晶片的真空吸附和/或静电吸附,作为支撑晶片的方法。
下文详细描述根据本发明的半导体基材和太阳能电池的制造方法的优选条件。首先,以硅为例子描述多孔层。氢氟酸(HF)溶液优选用于阳极化处理中以形成多孔层103,也可利用盐酸溶液、硫酸溶液、或类似溶液。通过利用HF溶液,在HF浓度不小于10%的的情况下,使p+(n+)层102多孔化。阳极化处理时的电流最好根据HF浓度、所想要的多孔层薄膜厚度、多孔层的表面条件等确定,其合适范围约为1mA/cm2到100mA/cm2。
当将诸如乙醇等加入到HF溶液中,就可以在不搅拌的情况下,立刻从反应表面上消除阳极化处理时由于气体析出而引起的反应气泡,由此可以均匀有效地形成多孔层。所加入的醇的量最好根据HF浓度、所想要的多孔层薄膜厚度、或多孔层的表面条件来确定,尤其必须特别注意,确保所加入醇的量不会使HF浓度变得过低。
单晶硅的密度是2.33g/cm3,但是例如通过在50到20%的范围内改变HF溶液的浓度,多孔层的密度可以在例如1.1到0.6g/cm3的范围内变化。通过改变阳极化处理电流也可以使多孔率变化,增加电流也会增加多孔性。
多孔层的机械强度因多孔性而不同,并且认为要比体硅足够低。例如,假设多孔性是50%,其机械强度可认为是硅基体的一半。如果将基片粘接到多孔层的表面,并且在多孔层和基片之间有足够的粘合剂,通过在所形成多孔层的硅晶片和基片之间施加压力、拉力、或剪切力可使多孔层断裂。如果增加多孔性,利用较弱的力就可以使多孔层断裂。
由于孔是阳极反应所必需的,多孔层主要由其中包括孔的p型硅的阳极化处理而制成(T.Unagami,J.Electrochem.Soc.,vol.127,476(1980))。但是另一方面,也有报导说多孔层可以由低电阻的n型硅所制成(R.P.Holmstrom andJ.Y.Chi,Appl.Phys.Lett.,vol.42,386(1983))。因此,可以认为能够利用任何低电阻硅形成多孔层,而不受导电类型的约束,也就是说,不受p型或n型的约束。根据导电类型来实现多孔层的选择形成也是可能的;例如,在FIPOS(多孔氧化硅的完全绝缘)过程中,通过对暗区阳极化处理,只有p型层能够产生多孔。
当利用透射电子显微镜进行观察时,单晶硅阳极化处理得到的多孔层(硅层)具有直径大约几nm的小孔,并且多孔硅的密度不会超过单晶硅密度的一半。尽管有这种情况,仍维持单晶性,以便可以通过热CVD、液相生长、或类似技术在多孔层(硅层)上生长外延层。
此外,由于多孔层内部包括大量空穴,与体积相比其表面区域显著增加。结果是,其化学腐蚀速度远比普通单晶体层的腐蚀速度大得多。
通过用多晶体硅代替单晶硅进行阳极化处理也可同样地获得多孔层。通过热CVD、液相生长、或类似技术可以在该处生长晶体硅层。(在这种情况下,可以实现与多晶体硅的晶粒尺寸对应的部分外延生长。)
[实施例]
下面的例子是示例性的而不是限制性的。
(例子1)
通过热扩散将硼(B)引入到p型硅单晶体基片(硅晶片)301的表面以形成p+层,该硅单晶体基片301具有800μm的厚度和4英寸的直径。在氢氟酸溶液中以两个电流值上对该基片进行阳极化处理,以获得厚度约为10μm的多孔层302。先以8mA/cm2的密度提供十分钟的电流,再以30mA/cm2的密度提供一分钟的电流。在提供电流的过程中,电流的变化导致形成双层结构,该双层结构包括致密结构的多孔层和粗大结构的多孔层。
然后对其中形成有多孔层302的p类型硅单晶体基片(硅晶片)301,在氢气中以1050℃的表面温度进行一分钟的退火处理。此后,将基片浸入到900℃的金属铟溶液中,其中硅被溶解到过饱和的浓度。然后将溶液逐步冷却以形成厚度为30μm的外延层(下文中将称为硅层)303。这时,将与多孔层302一侧相反侧的基片301的表面覆盖氧化物薄膜,以抵制溶液,由此仅在形成多孔层的表面上形成硅层303。
下一步,将晶片分为两个70×34mm2的区域,然后在其中形成太阳能电池。首先,对两个70×34mm2的区域303-1、303-2用掩模覆盖,并且通过RIE干式蚀刻从表面上移走适当深度的多孔层(图3A)。然后移走掩模并且将磷(P)扩散到每块70×34mm2硅层303的表面以形成n+层。接着,在其上形成电极304和抗反射层305。通过真空吸附固定除太阳能电池一侧的基片301的其它表面,并且在一个硅层303-1的抗反射层304上施加透明粘合剂,但是不能溢到所移走部分和所移走侧面上。然后将透明支撑元件307固定到该表面上,此后从接近中心部分对多孔层302施加力,以从硅基片301上分离硅层303-1(图3B)。在硅层上形成背部电极,由此获得薄膜太阳能电池。同样地,对剩余的硅层303-2也进行处理以形成薄膜太阳能电池。在分离期间,能够从整个表面上完全分离薄膜半导体层而不会抬起晶片。
通过腐蚀从硅晶片301上移走多孔层的残余物,并且用硅晶片301重复上述步骤总计5次。评价由此获得薄膜太阳能电池的特性,证实了不管使用晶片多少次,它们都具有稳定的高效率。
(例子2)
以相似于例子1的方式,对直径为5英寸的p+类型硅晶片401提供电流,先以8mA/cm2的密度提供十分钟的电流,再以20mA/cm2的密度提供一分钟的电流,以在形成双层结构多孔层402,此后通过CVD在其两个表面外延生长,以形成每个厚度都是15μm的外延层(硅半导体层)403a、403b。然后向在多孔层上沉积的外延层403a的表面上施加扩散剂以形成p+层,此后在403a表面沿晶片的直径以3mm的宽度对硅层进行腐蚀,由此将该层分为两个区域403a-1、403a-2(图4A)。这里所使用的腐蚀剂是氢氟酸-硝酸(HF∶HNO3=1∶1)。以相似于例子1的方式,在外延层的两个分离区域403a-1、403a-2的每一个上形成4cm2的太阳能电池,此后在一个层403a-1的表面上施加透明粘合剂404并使其不溢出。将支撑元件405粘接到表面。通过静电吸附固定403b层表面,同时,对支撑元件施加拉力,以从腐蚀线开始分离(图4B),由此获得太阳能电池。以相似的方式分离另一层403a-2。这时,几乎从整个表面完全分离了该层而不用抬起晶片。在移走多孔层的残余物之后,利用导电粘合剂将由此获得的薄膜太阳能电池粘接到金属元件上,并且评价其特性。
从硅层401上移走多孔层残余物,并且对硅层401重复共十次上述步骤的处理。由于在每次处理过程中都要在两个面上沉积硅层,晶片的与多孔层厚度相等的量的减少被补偿,即使在上述步骤多次重复之后也不会对处理造成困难。对由此获得的太阳能电池的性质进行比较和评价,证实了与使用晶片的次数无关,它们都具有稳定的高效率。
(例子3)
象在例子1中那样,在5英寸的硅晶片501上形成p+层,此后通过提供电流进行阳极化处理以形成厚度约为12μm的双层结构的多孔层502,其中先以8mA/cm2的密度提供十分钟的电流,再以25mA/cm2的密度提供一分钟的电流。然后在多孔层上外延生长0.5μm厚度的半导体层,此后将P(磷)扩散到其中以形成n+层503。接着,通过液相生长沉积30μm厚度的外延层(单晶体半导体层)504。然后在晶片的中心部分形成80mm×80mm的正方形抗蚀剂掩模,并且通过RIE干式蚀刻移走外延层(在下文中称为硅层)(图5A)。然后,将掩模移走,同时利用Al箔将金属元件505热焊到留下的硅层504上,将Al原子扩散进硅层504的键合面上以形成p+层。此后,通过真空吸附和静电吸附的组合来固定背表面,并且对多孔层502施加力以获得薄膜。这时,从晶片边缘接近中心2cm的位置开始分离,由此不抬起晶片就可实现分离。将留在薄膜半导体层上的多孔层残余物去除,并且在其上形成栅极。此后,在其上沉积还具有钝化作用的TiO2的抗反射薄膜,以形成4cm2的太阳能电池,并对其评价。在薄膜分离后,从晶片上腐蚀掉多孔层的剩余物,并且对晶片总共重复五次上述步骤的处理。
将这样获得的太阳能电池进行比较和评价,证实了不管晶片使用次数多少,都具有稳定的高效率。
当用支撑元件对经由基片上的分离层形成的半导体层进行支撑时,在支撑元件上施加拉力来机械破坏分离层,从而形成薄膜半导体,通过由真空和/或静电吸附来固定基片,并且从除基片边缘之外的区域开始薄膜外延层的分离,可以防止因分离力超过基片的粘接力而抬起基片,还能以较高产量获得具有优异性质的薄膜外延层,并且还允许重复使用基片,由此能够以低成本进行制造。
Claims (5)
1.一种制造半导体基材的方法,该方法包括下列步骤:在单晶硅晶片的表面上通过阳极化形成多孔层;在所述多孔层上外延生长半导体层;除去部分半导体层和多孔层;通过支撑元件支撑通过基片上的多孔层形成的半导体层;固定基片;此后对支撑元件施加拉力,机械破坏多孔层以形成薄膜半导体;其中,在施加拉力的步骤中,从基片中除边缘之外的区域开始分离。
2.根据权利要求1所述的方法,其中在通过真空吸附固定基片的同时,对薄膜半导体层进行分离。
3.根据权利要求1所述的方法,其中在通过静电吸附固定基片的同时,对薄膜半导体层进行分离。
4.根据权利要求1所述的方法,其中在通过真空吸附和静电吸附固定基片的同时,对薄膜半导体层进行分离。
5.根据权利要求1所述的方法,其中将基片重复使用。
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Families Citing this family (78)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002075917A (ja) * | 2000-08-25 | 2002-03-15 | Canon Inc | 試料の分離装置及び分離方法 |
JP4708577B2 (ja) * | 2001-01-31 | 2011-06-22 | キヤノン株式会社 | 薄膜半導体装置の製造方法 |
JP4803884B2 (ja) | 2001-01-31 | 2011-10-26 | キヤノン株式会社 | 薄膜半導体装置の製造方法 |
JP3697214B2 (ja) * | 2001-03-16 | 2005-09-21 | キヤノン株式会社 | 半導体膜の製造方法 |
JP2002289536A (ja) * | 2001-03-27 | 2002-10-04 | Sony Corp | 熱cvd装置および薄膜半導体素子の製造方法 |
JP4266106B2 (ja) * | 2001-09-27 | 2009-05-20 | 株式会社東芝 | 粘着性テープの剥離装置、粘着性テープの剥離方法、半導体チップのピックアップ装置、半導体チップのピックアップ方法及び半導体装置の製造方法 |
US6616854B2 (en) * | 2001-12-17 | 2003-09-09 | Motorola, Inc. | Method of bonding and transferring a material to form a semiconductor device |
FR2842647B1 (fr) * | 2002-07-17 | 2004-09-17 | Soitec Silicon On Insulator | Procede de transfert de couche |
FR2850390B1 (fr) * | 2003-01-24 | 2006-07-14 | Soitec Silicon On Insulator | Procede d'elimination d'une zone peripherique de colle lors de la fabrication d'un substrat composite |
US7122095B2 (en) * | 2003-03-14 | 2006-10-17 | S.O.I.Tec Silicon On Insulator Technologies S.A. | Methods for forming an assembly for transfer of a useful layer |
SG116533A1 (en) * | 2003-03-26 | 2005-11-28 | Toshiba Kk | Semiconductor manufacturing apparatus and method of manufacturing semiconductor device. |
AU2003902270A0 (en) * | 2003-05-09 | 2003-05-29 | Origin Energy Solar Pty Ltd | Separating and assembling semiconductor strips |
JP4438049B2 (ja) * | 2003-08-11 | 2010-03-24 | キヤノン株式会社 | 電界効果トランジスタ及びそれを用いたセンサ並びにその製造方法 |
CN100359393C (zh) | 2003-12-17 | 2008-01-02 | Lg.菲利浦Lcd株式会社 | 液晶分配装置 |
JP2005210062A (ja) * | 2003-12-26 | 2005-08-04 | Canon Inc | 半導体部材とその製造方法、及び半導体装置 |
CN100347837C (zh) * | 2004-07-21 | 2007-11-07 | 宏齐科技股份有限公司 | 半导体基材构造及其加工方法 |
US9508886B2 (en) | 2007-10-06 | 2016-11-29 | Solexel, Inc. | Method for making a crystalline silicon solar cell substrate utilizing flat top laser beam |
US8129822B2 (en) * | 2006-10-09 | 2012-03-06 | Solexel, Inc. | Template for three-dimensional thin-film solar cell manufacturing and methods of use |
US8399331B2 (en) | 2007-10-06 | 2013-03-19 | Solexel | Laser processing for high-efficiency thin crystalline silicon solar cell fabrication |
US8420435B2 (en) * | 2009-05-05 | 2013-04-16 | Solexel, Inc. | Ion implantation fabrication process for thin-film crystalline silicon solar cells |
US9362439B2 (en) * | 2008-05-07 | 2016-06-07 | Silicon Genesis Corporation | Layer transfer of films utilizing controlled shear region |
US8035028B2 (en) * | 2006-10-09 | 2011-10-11 | Solexel, Inc. | Pyramidal three-dimensional thin-film solar cells |
US8193076B2 (en) | 2006-10-09 | 2012-06-05 | Solexel, Inc. | Method for releasing a thin semiconductor substrate from a reusable template |
US8035027B2 (en) * | 2006-10-09 | 2011-10-11 | Solexel, Inc. | Solar module structures and assembly methods for pyramidal three-dimensional thin-film solar cells |
US8293558B2 (en) * | 2006-10-09 | 2012-10-23 | Solexel, Inc. | Method for releasing a thin-film substrate |
US20080264477A1 (en) * | 2006-10-09 | 2008-10-30 | Soltaix, Inc. | Methods for manufacturing three-dimensional thin-film solar cells |
US20100304521A1 (en) * | 2006-10-09 | 2010-12-02 | Solexel, Inc. | Shadow Mask Methods For Manufacturing Three-Dimensional Thin-Film Solar Cells |
US7999174B2 (en) * | 2006-10-09 | 2011-08-16 | Solexel, Inc. | Solar module structures and assembly methods for three-dimensional thin-film solar cells |
WO2009026240A1 (en) * | 2007-08-17 | 2009-02-26 | Solexel, Inc. | Methods for liquid transfer coating of three-dimensional substrates |
US8322300B2 (en) * | 2008-02-07 | 2012-12-04 | Sunpower Corporation | Edge coating apparatus with movable roller applicator for solar cell substrates |
US8662008B2 (en) * | 2008-02-07 | 2014-03-04 | Sunpower Corporation | Edge coating apparatus for solar cell substrates |
WO2009114108A2 (en) * | 2008-03-08 | 2009-09-17 | Crystal Solar, Inc. | Integrated method and system for manufacturing monolithic panels of crystalline solar cells |
US20100144080A1 (en) * | 2008-06-02 | 2010-06-10 | Solexel, Inc. | Method and apparatus to transfer coat uneven surface |
US8288195B2 (en) * | 2008-11-13 | 2012-10-16 | Solexel, Inc. | Method for fabricating a three-dimensional thin-film semiconductor substrate from a template |
US8294026B2 (en) | 2008-11-13 | 2012-10-23 | Solexel, Inc. | High-efficiency thin-film solar cells |
WO2010063003A1 (en) * | 2008-11-26 | 2010-06-03 | Solexel, Inc. | Truncated pyramid structures for see-through solar cells |
US9076642B2 (en) | 2009-01-15 | 2015-07-07 | Solexel, Inc. | High-Throughput batch porous silicon manufacturing equipment design and processing methods |
US8926803B2 (en) * | 2009-01-15 | 2015-01-06 | Solexel, Inc. | Porous silicon electro-etching system and method |
US8906218B2 (en) | 2010-05-05 | 2014-12-09 | Solexel, Inc. | Apparatus and methods for uniformly forming porous semiconductor on a substrate |
MY162405A (en) * | 2009-02-06 | 2017-06-15 | Solexel Inc | Trench Formation Method For Releasing A Thin-Film Substrate From A Reusable Semiconductor Template |
US9343299B2 (en) * | 2009-02-06 | 2016-05-17 | Solexel, Inc. | Trench formation method for releasing a substrate from a semiconductor template |
US8828517B2 (en) | 2009-03-23 | 2014-09-09 | Solexel, Inc. | Structure and method for improving solar cell efficiency and mechanical strength |
EP2419306B1 (en) * | 2009-04-14 | 2016-03-30 | Solexel, Inc. | High efficiency epitaxial chemical vapor deposition (cvd) reactor |
US9099584B2 (en) * | 2009-04-24 | 2015-08-04 | Solexel, Inc. | Integrated three-dimensional and planar metallization structure for thin film solar cells |
US9318644B2 (en) | 2009-05-05 | 2016-04-19 | Solexel, Inc. | Ion implantation and annealing for thin film crystalline solar cells |
CN102460716B (zh) | 2009-05-05 | 2015-03-25 | 速力斯公司 | 高生产率多孔半导体制造设备 |
US8445314B2 (en) * | 2009-05-22 | 2013-05-21 | Solexel, Inc. | Method of creating reusable template for detachable thin film substrate |
WO2010138976A1 (en) * | 2009-05-29 | 2010-12-02 | Solexel, Inc. | Three-dimensional thin-film semiconductor substrate with through-holes and methods of manufacturing |
EP2510550A4 (en) | 2009-12-09 | 2014-12-24 | Solexel Inc | HIGH-EFFECT PHOTOVOLTAIC SOLAR CELL STRUCTURES WITH REAR-SIDE CONTACTS AND METHODS OF MAKING USING THREE-DIMENSIONAL SEMICONDUCTOR ABSORBERS |
CN102844883B (zh) | 2010-02-12 | 2016-01-20 | 速力斯公司 | 用于制造光电池和微电子器件的半导体衬底的双面可重复使用的模板 |
KR101369282B1 (ko) | 2010-06-09 | 2014-03-04 | 솔렉셀, 인크. | 고생산성 박막 증착 방법 및 시스템 |
JP5902406B2 (ja) * | 2010-06-25 | 2016-04-13 | 株式会社半導体エネルギー研究所 | 分離方法および半導体装置の作製方法 |
EP2601687A4 (en) | 2010-08-05 | 2018-03-07 | Solexel, Inc. | Backplane reinforcement and interconnects for solar cells |
CN102560636B (zh) * | 2010-12-14 | 2016-03-30 | 北京北方微电子基地设备工艺研究中心有限责任公司 | 一种基片承载装置及应用该装置的基片处理设备 |
EP2710639A4 (en) | 2011-05-20 | 2015-11-25 | Solexel Inc | SELF-ACTIVATED FRONT SURFACE POLARIZATION FOR A SOLAR CELL |
US8895347B2 (en) | 2012-02-16 | 2014-11-25 | Industrial Technology Research Institute | Method for fabricating semiconductor layer having textured surface and method for fabricating solar cell |
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US11276785B2 (en) | 2018-04-06 | 2022-03-15 | Sunpower Corporation | Laser assisted metallization process for solar cell fabrication |
WO2019195804A1 (en) | 2018-04-06 | 2019-10-10 | Sunpower Corporation | Laser assisted metallization process for solar cell circuit formation |
US11664472B2 (en) | 2018-04-06 | 2023-05-30 | Maxeon Solar Pte. Ltd. | Laser assisted metallization process for solar cell stringing |
US11362220B2 (en) | 2018-04-06 | 2022-06-14 | Sunpower Corporation | Local metallization for semiconductor substrates using a laser beam |
CN113299576B (zh) * | 2020-02-21 | 2022-11-22 | 济南晶正电子科技有限公司 | 一种薄膜机械分离装置 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JP3257580B2 (ja) | 1994-03-10 | 2002-02-18 | キヤノン株式会社 | 半導体基板の作製方法 |
JP3381443B2 (ja) | 1995-02-02 | 2003-02-24 | ソニー株式会社 | 基体から半導体層を分離する方法、半導体素子の製造方法およびsoi基板の製造方法 |
JPH09331049A (ja) * | 1996-04-08 | 1997-12-22 | Canon Inc | 貼り合わせsoi基板の作製方法及びsoi基板 |
SG55413A1 (en) * | 1996-11-15 | 1998-12-21 | Method Of Manufacturing Semico | Method of manufacturing semiconductor article |
EP0851513B1 (en) | 1996-12-27 | 2007-11-21 | Canon Kabushiki Kaisha | Method of producing semiconductor member and method of producing solar cell |
JP3501606B2 (ja) | 1996-12-27 | 2004-03-02 | キヤノン株式会社 | 半導体基材の製造方法、および太陽電池の製造方法 |
JP3647176B2 (ja) | 1996-12-27 | 2005-05-11 | キヤノン株式会社 | 半導体基材及び太陽電池の製造方法及びその製造装置 |
JP4161380B2 (ja) * | 1997-03-25 | 2008-10-08 | ソニー株式会社 | 薄膜半導体および半導体装置の製造方法 |
CA2233115C (en) * | 1997-03-27 | 2002-03-12 | Canon Kabushiki Kaisha | Semiconductor substrate and method of manufacturing the same |
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JP2001007362A (ja) | 2001-01-12 |
EP1061566A3 (en) | 2007-01-31 |
EP1061566A2 (en) | 2000-12-20 |
US6448155B1 (en) | 2002-09-10 |
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