CN114121613A - 一种改善fdsoi外延生长的薄膜工艺优化方法 - Google Patents
一种改善fdsoi外延生长的薄膜工艺优化方法 Download PDFInfo
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- CN114121613A CN114121613A CN202210096866.1A CN202210096866A CN114121613A CN 114121613 A CN114121613 A CN 114121613A CN 202210096866 A CN202210096866 A CN 202210096866A CN 114121613 A CN114121613 A CN 114121613A
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02373—Group 14 semiconducting materials
- H01L21/02381—Silicon, silicon germanium, germanium
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02658—Pretreatments
- H01L21/02661—In-situ cleaning
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
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CN202210096866.1A CN114121613B (zh) | 2022-01-27 | 2022-01-27 | 一种改善fdsoi外延生长的薄膜工艺优化方法 |
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CN202210096866.1A CN114121613B (zh) | 2022-01-27 | 2022-01-27 | 一种改善fdsoi外延生长的薄膜工艺优化方法 |
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CN114121613A true CN114121613A (zh) | 2022-03-01 |
CN114121613B CN114121613B (zh) | 2022-04-22 |
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Citations (23)
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---|---|---|---|---|
US6281063B1 (en) * | 2000-10-17 | 2001-08-28 | United Microelectronics Corp. | Method for manufacturing trench isolation |
US6605843B1 (en) * | 2000-08-11 | 2003-08-12 | Advanced Micro Devices, Inc. | Fully depleted SOI device with tungsten damascene contacts and method of forming same |
US20040110358A1 (en) * | 2002-12-09 | 2004-06-10 | Lee Joon Hyeon | Method for forming isolation film for semiconductor devices |
US20040217420A1 (en) * | 2003-04-30 | 2004-11-04 | Yee-Chia Yeo | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors |
US20060027889A1 (en) * | 2004-08-05 | 2006-02-09 | International Business Machines Corporation | Isolated fully depleted silicon-on-insulator regions by selective etch |
WO2006118799A1 (en) * | 2005-05-03 | 2006-11-09 | Advanced Micro Devices, Inc. | Methodology for deposition of doped seg for raised source/drain regions |
US20070164364A1 (en) * | 2006-01-06 | 2007-07-19 | Hirohisa Kawasaki | Semiconductor device using sige for substrate and method for fabricating the same |
US20070290265A1 (en) * | 2001-10-12 | 2007-12-20 | Augusto Carlos J | Method of Fabricating Heterojunction Photodiodes with CMOS |
WO2008084519A1 (ja) * | 2007-01-11 | 2008-07-17 | Shin-Etsu Handotai Co., Ltd. | シリコンエピタキシャルウェーハの製造方法 |
US20140027818A1 (en) * | 2012-07-28 | 2014-01-30 | Gold Standard Simulations Ltd. | Gate Recessed FDSOI Transistor with Sandwich of Active and Etch Control Layers |
US20150108576A1 (en) * | 2013-10-23 | 2015-04-23 | Stmicroelectronics (Crolles 2) Sas | Method for fabricating nmos and pmos transistors on a substrate of the soi, in particular fdsoi, type and corresponding integrated circuit |
US9634088B1 (en) * | 2016-06-17 | 2017-04-25 | Globalfoundries Inc. | Junction formation with reduced CEFF for 22NM FDSOI devices |
CN107946231A (zh) * | 2017-11-22 | 2018-04-20 | 上海华力微电子有限公司 | 一种FDSOI器件SOI和bulk区域浅槽形貌优化方法 |
CN109065496A (zh) * | 2018-07-27 | 2018-12-21 | 上海华力集成电路制造有限公司 | Fdsoi工艺中混合外延硅的制造方法 |
CN109637974A (zh) * | 2018-12-19 | 2019-04-16 | 上海华力集成电路制造有限公司 | 一种fdsoi形成方法 |
US20190157425A1 (en) * | 2017-11-22 | 2019-05-23 | Semiconductor Manufacturing International (Shanghai) Corporation | Semiconductor device and fabrication method thereof |
CN109950256A (zh) * | 2019-03-29 | 2019-06-28 | 上海华力集成电路制造有限公司 | 改善fdsoi pmos结构且提高mos器件性能的方法 |
US20190318955A1 (en) * | 2018-04-11 | 2019-10-17 | Globalfoundries Inc. | Self-aligned single diffusion break for fully depleted silicon-on-insulator and method for producing the same |
US20200083253A1 (en) * | 2018-09-10 | 2020-03-12 | International Business Machines Corporation | Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages |
CN112186075A (zh) * | 2020-10-10 | 2021-01-05 | 中国科学院微电子研究所 | 一种波导型光电探测器及制造方法 |
CN112635391A (zh) * | 2020-12-07 | 2021-04-09 | 广东省大湾区集成电路与系统应用研究院 | 一种绝缘体上应变锗锡硅衬底、晶体管及其制备方法 |
CN112635492A (zh) * | 2020-12-02 | 2021-04-09 | 广东省大湾区集成电路与系统应用研究院 | 一种应变GeSiOI衬底及其制作方法 |
CN113745223A (zh) * | 2020-08-14 | 2021-12-03 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
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- 2022-01-27 CN CN202210096866.1A patent/CN114121613B/zh active Active
Patent Citations (24)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6605843B1 (en) * | 2000-08-11 | 2003-08-12 | Advanced Micro Devices, Inc. | Fully depleted SOI device with tungsten damascene contacts and method of forming same |
US6281063B1 (en) * | 2000-10-17 | 2001-08-28 | United Microelectronics Corp. | Method for manufacturing trench isolation |
US20070290265A1 (en) * | 2001-10-12 | 2007-12-20 | Augusto Carlos J | Method of Fabricating Heterojunction Photodiodes with CMOS |
US20040110358A1 (en) * | 2002-12-09 | 2004-06-10 | Lee Joon Hyeon | Method for forming isolation film for semiconductor devices |
US20040217420A1 (en) * | 2003-04-30 | 2004-11-04 | Yee-Chia Yeo | Semiconductor-on-insulator chip incorporating strained-channel partially-depleted, fully-depleted, and multiple-gate transistors |
US20060027889A1 (en) * | 2004-08-05 | 2006-02-09 | International Business Machines Corporation | Isolated fully depleted silicon-on-insulator regions by selective etch |
WO2006118799A1 (en) * | 2005-05-03 | 2006-11-09 | Advanced Micro Devices, Inc. | Methodology for deposition of doped seg for raised source/drain regions |
US20070164364A1 (en) * | 2006-01-06 | 2007-07-19 | Hirohisa Kawasaki | Semiconductor device using sige for substrate and method for fabricating the same |
WO2008084519A1 (ja) * | 2007-01-11 | 2008-07-17 | Shin-Etsu Handotai Co., Ltd. | シリコンエピタキシャルウェーハの製造方法 |
JP2008171972A (ja) * | 2007-01-11 | 2008-07-24 | Shin Etsu Handotai Co Ltd | シリコンエピタキシャルウェーハの製造方法 |
US20140027818A1 (en) * | 2012-07-28 | 2014-01-30 | Gold Standard Simulations Ltd. | Gate Recessed FDSOI Transistor with Sandwich of Active and Etch Control Layers |
US20150108576A1 (en) * | 2013-10-23 | 2015-04-23 | Stmicroelectronics (Crolles 2) Sas | Method for fabricating nmos and pmos transistors on a substrate of the soi, in particular fdsoi, type and corresponding integrated circuit |
US9634088B1 (en) * | 2016-06-17 | 2017-04-25 | Globalfoundries Inc. | Junction formation with reduced CEFF for 22NM FDSOI devices |
CN107946231A (zh) * | 2017-11-22 | 2018-04-20 | 上海华力微电子有限公司 | 一种FDSOI器件SOI和bulk区域浅槽形貌优化方法 |
US20190157425A1 (en) * | 2017-11-22 | 2019-05-23 | Semiconductor Manufacturing International (Shanghai) Corporation | Semiconductor device and fabrication method thereof |
US20190318955A1 (en) * | 2018-04-11 | 2019-10-17 | Globalfoundries Inc. | Self-aligned single diffusion break for fully depleted silicon-on-insulator and method for producing the same |
CN109065496A (zh) * | 2018-07-27 | 2018-12-21 | 上海华力集成电路制造有限公司 | Fdsoi工艺中混合外延硅的制造方法 |
US20200083253A1 (en) * | 2018-09-10 | 2020-03-12 | International Business Machines Corporation | Fully depleted semiconductor-on-insulator transistors with different buried dielectric layer charges and different threshold voltages |
CN109637974A (zh) * | 2018-12-19 | 2019-04-16 | 上海华力集成电路制造有限公司 | 一种fdsoi形成方法 |
CN109950256A (zh) * | 2019-03-29 | 2019-06-28 | 上海华力集成电路制造有限公司 | 改善fdsoi pmos结构且提高mos器件性能的方法 |
CN113745223A (zh) * | 2020-08-14 | 2021-12-03 | 台湾积体电路制造股份有限公司 | 半导体器件及其形成方法 |
CN112186075A (zh) * | 2020-10-10 | 2021-01-05 | 中国科学院微电子研究所 | 一种波导型光电探测器及制造方法 |
CN112635492A (zh) * | 2020-12-02 | 2021-04-09 | 广东省大湾区集成电路与系统应用研究院 | 一种应变GeSiOI衬底及其制作方法 |
CN112635391A (zh) * | 2020-12-07 | 2021-04-09 | 广东省大湾区集成电路与系统应用研究院 | 一种绝缘体上应变锗锡硅衬底、晶体管及其制备方法 |
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Effective date of registration: 20220914 Address after: 510000 building a, No. 136, Kaiyuan Avenue, Huangpu Development Zone, Guangzhou, Guangdong Patentee after: Guangdong Dawan District integrated circuit and System Application Research Institute Patentee after: Ruili flat core Microelectronics (Guangzhou) Co.,Ltd. Address before: 510000 building a, No. 136, Kaiyuan Avenue, Huangpu Development Zone, Guangzhou, Guangdong Patentee before: Guangdong Dawan District integrated circuit and System Application Research Institute Patentee before: AoXin integrated circuit technology (Guangdong) Co.,Ltd. |