CN109817713B - 半导体器件及其形成方法 - Google Patents

半导体器件及其形成方法 Download PDF

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CN109817713B
CN109817713B CN201711172879.8A CN201711172879A CN109817713B CN 109817713 B CN109817713 B CN 109817713B CN 201711172879 A CN201711172879 A CN 201711172879A CN 109817713 B CN109817713 B CN 109817713B
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semiconductor device
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conductive ions
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刘轶群
何永根
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Semiconductor Manufacturing International Shanghai Corp
SMIC Advanced Technology R&D Shanghai Corp
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SMIC Advanced Technology R&D Shanghai Corp
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Abstract

一种半导体器件及其形成方法，其中方法包括：提供基底，所述基底上具有栅极结构；在所述栅极结构两侧的基底中分别形成初始槽；对所述初始槽的内壁进行表面圆滑处理，使初始槽形成凹槽，所述凹槽的底部表面和侧壁之间的拐角处呈圆角；在所述凹槽的内壁形成种子层，且所述种子层覆盖凹槽的全部内壁；在所述凹槽中形成位于种子层表面的源漏体层。所述方法提高了半导体器件的性能。

Description

半导体器件及其形成方法
技术领域
本发明涉及半导体制造领域，尤其涉及一种半导体器件及其形成方法。
背景技术
MOS晶体管是现代集成电路中最重要的元件之一。MOS晶体管的基本结构包括：半导体衬底；位于半导体衬底表面的栅极结构，位于栅极结构一侧半导体衬底内的源区和位于栅极结构另一侧半导体衬底内的漏区。MOS晶体管的工作原理是：通过在栅极结构施加电压，调节通过栅极结构底部沟道的电流来产生开关信号。
随着半导体技术的发展，传统的平面式的MOS晶体管对沟道电流的控制能力变弱，造成严重的漏电流。而鳍式场效应晶体管(Fin FET)是一种新兴的多栅器件，一般包括凸出于半导体衬底表面的鳍部，覆盖部分所述鳍部的顶部表面和侧壁表面的栅极结构，位于栅极结构一侧的鳍部内的源区和位于栅极结构另一侧的鳍部内的漏区。
然而，现有技术中无论是平面式的MOS晶体管还是鳍式场效应晶体管构成的半导体器件的性能均较差。
发明内容
本发明解决的问题是提供一种半导体器件及其形成方法，以提高半导体器件的性能。
为解决上述问题，本发明提供一种半导体器件的形成方法，包括：提供基底，所述基底上具有栅极结构；在所述栅极结构两侧的基底中分别形成初始槽；对所述初始槽的内壁进行表面圆滑处理，使初始槽形成凹槽；在所述凹槽的内壁形成种子层，且所述种子层覆盖凹槽的全部内壁；在所述凹槽中形成位于种子层表面的源漏体层。
可选的，所述表面圆滑处理的工艺包括退火处理。
可选的，所述退火处理包括尖峰退火。
可选的，所述退火处理的参数包括：采用的气体为N2和H2中的一种或二者的结合，退火温度为800摄氏度～1000摄氏度，退火压力为5torr～50torr。
可选的，所述种子层和所述源漏体层中均掺杂有导电离子，所述种子层中导电离子的浓度小于所述源漏体层中导电离子的浓度。
可选的，当所述半导体器件的类型为N型时，所述种子层的材料为具有导电离子的硅或碳硅；所述源漏体层的材料为具有导电离子的硅或碳硅；所述导电离子的导电类型为N型。
可选的，当所述半导体器件的类型为P型时，所述种子层的材料为具有导电离子的锗硅；所述源漏体层的材料为具有导电离子的锗硅，且所述源漏体层中锗离子的浓度大于所述种子层中锗离子的浓度；所述导电离子的导电类型为P型。
可选的，所述种子层中导电离子的浓度为所述源漏体层中导电离子浓度的1％～5％。
可选的，所述种子层的材料为具有导电离子的锗硅，所述导电离子为B离子；形成所述种子层的工艺为外延生长工艺，参数包括：采用的气体包括SiH2Cl2、GeH4、B2H6和HCl，SiH2Cl2的流量为100sccm～200sccm，GeH4的流量为8sccm～21sccm，B2H6的流量为15sccm～50sccm，HCl的流量为50sccm～100sccm，温度为660摄氏度～680摄氏度，腔室压强为100torr～200torr。
可选的，所述半导体器件的类型为N型，所述种子层的材料为硅；形成所述种子层的工艺为外延生长工艺，参数包括：采用的气体包括SiH2Cl2和HCl，SiH2Cl2的流量为100sccm～200sccm，HCl的流量为50sccm～100sccm，温度为700摄氏度～750摄氏度，腔室压强为100torr～200torr。
可选的，所述凹槽底部种子层的平均厚度大于所述凹槽侧壁种子层的平均厚度。
可选的，所述凹槽底部的种子层的平均厚度为10nm～16nm，所述凹槽侧壁的种子层的平均厚度为6nm～8nm。
可选的，形成所述源漏体层的工艺为外延生长工艺。
本发明还提供一种半导体器件，包括：基底；位于所述基底上的栅极结构；分别位于所述栅极结构两侧基底中的凹槽；位于所述凹槽内壁的种子层，且所述种子层覆盖凹槽的全部内壁；在所述凹槽中且位于种子层表面的源漏体层。
可选的，所述种子层和所述源漏体层中均掺杂有导电离子，所述种子层中导电离子的浓度小于所述源漏体层中导电离子的浓度。
可选的，当所述半导体器件的类型为N型时，所述种子层的材料为具有导电离子的硅或碳硅；所述源漏体层的材料为具有导电离子的硅或碳硅；所述导电离子的导电类型为N型。
可选的，当所述半导体器件的类型为P型时，所述种子层的材料为具有导电离子的锗硅；所述源漏体层的材料为具有导电离子的锗硅，且所述源漏体层中锗离子的浓度大于所述种子层中锗离子的浓度；所述导电离子的导电类型为P型。
可选的，所述种子层中导电离子的浓度为所述源漏体层中导电离子浓度的1％～5％。
可选的，所述凹槽底部种子层的平均厚度大于所述凹槽侧壁种子层的平均厚度。
可选的，所述凹槽底部的种子层的平均厚度为10nm～16nm，所述凹槽侧壁的种子层的平均厚度为6nm～8nm。
与现有技术相比，本发明的技术方案具有以下优点：
本发明技术方案提供的半导体器件的形成方法中，对所述初始槽的内壁进行表面圆滑处理。一方面，使凹槽的底部和侧壁交界的拐角处的表面较为圆滑，凹槽侧壁表面至凹槽底部表面的过渡较为平缓，使凹槽侧壁和底部交界的拐角处的表面的粗糙度较低；另一方面，表面圆滑处理使初始槽的底部和侧壁交界的拐角处的晶格损伤得到修复。综上，凹槽的底部和侧壁交界的拐角处的表面缺陷减少，凹槽的底部和侧壁交界的拐角处的表面态密度较低。进而使得凹槽的底部和侧壁交界的拐角处表面容易形成种子层，因此在种子层厚度一定的情况下，能使所述种子层覆盖凹槽的全部内壁，所述种子层作为源漏体层生长的过渡缓冲层。在形成源漏体层的过程中，避免源漏体层在部分凹槽内壁表面进行生长，源漏体层仅在种子层表面进行生长。进而使凹槽的底部和侧壁交界的拐角处的源漏体层的晶格缺陷较少，提高了源漏体层的质量，提高了半导体器件的性能。
本发明技术方案提供的半导体器件中，所述种子层作为源漏体层生长的过渡缓冲层。所述凹槽的底部表面和侧壁之间的拐角处呈圆角，在种子层厚度一定的情况下，所述种子层覆盖凹槽的全部内壁。避免源漏体层与部分凹槽内壁表面接触。进而使凹槽的底部和侧壁交界的拐角处的源漏体层的晶格缺陷较少，提高了源漏体层的质量，提高了半导体器件的性能。
附图说明
图1至图3是一种半导体器件形成过程的结构示意图；
图4至图8是本发明一实施例中半导体器件形成过程的结构示意图。
具体实施方式
正如背景技术所述，现有技术形成的半导体器件的性能较差。
图1至图3是一种半导体器件形成过程的结构示意图。
参考图1，提供基底，所述基底上具有栅极结构110；在所述栅极结构110两侧的基底中分别形成凹槽120。
参考图2，在所述凹槽120的内壁形成种子层130。
参考图3，在所述凹槽120(参考图2)中形成位于种子层130表面的源漏体层140。
所述凹槽120的形成工艺包括各向异性干刻工艺。各向异性干刻工艺的刻蚀方向性较强，形成凹槽120后，凹槽120侧壁表面至凹槽120底部表面的过渡较急，拐角处Q晶格完整性较差。且拐角处Q处残留部分副产物难以清洗去除。这样，拐角处Q缺陷较多，凹槽120底部和侧壁交界的拐角处Q的界面态较高，因此拐角处Q难以生长种子层130。
为了给源漏体层140提供较大的生长空空间，所述种子层130的厚度不能过厚。在此基础上，种子层130仅能覆盖部分凹槽120的内壁，拐角处Q没有种子层130形成。这样，使得部分源漏体层140需要在拐角处Q表面直接进行生长，源漏体层140在拐角处Q的生长没有种子层130作为过渡，使得源漏体层140的晶格缺陷较多，导致源漏体层140的质量较低，降低了半导体器件的性能。
在此基础上，本发明提供一种半导体器件的形成方法，在栅极结构两侧的基底中分别形成初始槽；对初始槽的内壁进行表面圆滑处理，使初始槽形成凹槽，所述凹槽的底部表面和侧壁之间的拐角处呈圆角；在凹槽的内壁形成种子层，且种子层覆盖凹槽的全部内壁；在凹槽中形成位于种子层表面的源漏体层。所述方法提高了半导体器件的性能。
为使本发明的上述目的、特征和优点能够更为明显易懂，下面结合附图对本发明的具体实施例做详细的说明。
图4至图8是本发明一实施例中半导体器件形成过程的结构示意图。
参考图4，提供基底200，所述基底200上具有栅极结构210。
本实施例中，以所述半导体器件为鳍式场效应晶体管为示例进行说明。相应的，所述基底200包括半导体衬底201和位于半导体衬底201上的鳍部202。
所述半导体衬底201可以是单晶硅、多晶硅或非晶硅。所述半导体衬底201的材料还可以为锗、锗化硅、砷化镓等半导体材料。本实施例中，半导体衬底201的材料为单晶硅。
本实施例中，所述鳍部202通过图形化半导体衬底201而形成。在其它实施例中，可以是：在半导体衬底上形成鳍部材料层，然后图形化所述鳍部材料层，从而形成鳍部。
本实施例中，所述半导体衬底201上还具有隔离结构，所述隔离结构覆盖鳍部202的部分侧壁表面。所述隔离结构的表面低于所述鳍部202的顶部表面。所述隔离结构的材料包括氧化硅。
在其它实施例中，所述半导体器件为平面式MOS晶体管，相应的，所述基底为平面式的半导体衬底。
所述栅极结构210包括位于基底上的栅介质层和位于栅介质层上的栅电极层。所述栅介质层的材料为氧化硅，所述栅电极层的材料为多晶硅。具体的，所述栅介质层横跨鳍部202、且覆盖鳍部202的部分侧壁表面和部分顶部表面。
所述栅极结构210的顶部表面具有顶保护层220。所述顶保护层220的材料包括氮化硅。
本实施例中，还包括：在所述栅极结构210的侧壁形成侧墙230。所述侧墙230的材料包括氮化硅。
参考图5，在所述栅极结构210两侧的基底200中分别形成初始槽240。
具体的，在所述栅极结构210和侧墙230两侧的鳍部202中分别形成初始槽240。
形成所述初始槽240的工艺包括各向异性干刻工艺。
所述初始槽240的形状包括“U”形。
所述初始槽240在平行于沟道方向上的尺寸为50nm～60nm。所述初始槽240的深度为50nm～60nm。
参考图6，对所述初始槽240的内壁进行表面圆滑处理，使初始槽240形成凹槽241，所述凹槽241的底部表面和侧壁之间的拐角处呈圆角。
所述表面圆滑处理的工艺包括退火处理。
采用退火工艺对初始槽240的内壁进行处理，作用包括：一方面，使凹槽241的底部和侧壁交界的拐角处的表面较为圆滑，凹槽241侧壁表面至凹槽241底部表面的过渡较为平缓，使凹槽241侧壁和底部交界的拐角处的表面的粗糙度较低；另一方面，表面圆滑处理使初始槽240的底部和侧壁交界的拐角处的晶格损伤得到修复。综上，使凹槽241的底部和侧壁交界的拐角处的表面缺陷减少，凹槽241的底部和侧壁交界的拐角处的表面态密度较低。
采用退火工艺对初始槽240的内壁表面圆滑处理的原理包括：在高温低压环境中，对初始槽240内壁表面材料的晶格进行清洁重建，减少表面能较高的(111)晶面，使凹槽241内壁表面相对于始槽240的内壁表面更圆滑。
所述退火处理包括尖峰退火。所述退火处理采用尖峰退火的好处包括：退火在较短的时间内完成，退火处理采用的高温对其它结构部件的影响较小。
所述退火处理的参数包括：采用的气体为N2和H2中的一种或二者的结合，退火温度为800摄氏度～1000摄氏度，退火压力为5torr～50torr。
在上述退火处理的参数条件下，随着采用的温度的降低，需要的压力降低。
所述退火处理的温度为800摄氏度～1000摄氏度的意义在于：若退火处理的温度小于800摄氏度，导致清洁和圆滑效果不到位；若退火处理的温度大于1000摄氏度，导致前制程离子注入扩散深度受到较大的影响，影响器件性能。
需要说明的是，在形成所述初始槽240的过程中产生副产聚合物，初始槽240拐角处的副产聚合物难以在清洗工艺中去除，初始槽240拐角处残留的副产聚合物能在表面圆滑处理的过程中去除。
参考图7，在所述凹槽241的内壁形成种子层250，且所述种子层250覆盖凹槽241的全部内壁。
本实施例中，当所述半导体器件的类型为N型时，所述种子层250的材料为具有导电离子的硅或碳硅，所述导电离子的导电类型为N型，如磷离子。当所述半导体器件的类型为P型时，所述种子层250的材料为具有导电离子的锗硅，所述导电离子的导电类型为P型，如硼离子。
在其它实施例中，当所述半导体器件的类型为N型时，种子层的材料为硅。
所述种子层250中掺杂有导电离子，所述种子层250中导电离子的浓度小于后续源漏体层中导电离子的浓度。
本实施例中，所述种子层250中导电离子的浓度为后续源漏体层中导电离子浓度的1％～5％。
所述种子层250的作用包括：为后续形成源漏体层提供生长的种子；所述种子层250的晶格错位较少，使后续在种子层250表面形成的源漏体层的晶格错位较少。
由于凹槽241的底部和侧壁交界的拐角处的表面缺陷减少，因此使得凹槽241的底部和侧壁交界的拐角处表面容易形成种子层250。因此在种子层250厚度一定的情况下，能使所述种子层250覆盖凹槽241的全部内壁。
在一个实施例中，所述种子层250的材料为具有导电离子的锗硅，所述导电离子为硼离子；相应的，形成所述种子层250的工艺为外延生长工艺，参数包括：采用的气体包括SiH2Cl2、GeH4、B2H6和HCl，SiH2Cl2的流量为100sccm～200sccm，GeH4的流量为8sccm～21sccm，B2H6的流量为15sccm～50sccm，温度为660摄氏度～680摄氏度，腔室压强为100torr～200tor。
在上述形成种子层250的外延生长工艺中，SiH2Cl2的流量和GeH4的流量相对与现有采用的流量均较大，在反应气体优先满足(100)晶面，其次满足(110)晶面生长种子层250的情况下，还有较充足的反应气体能满足(111)晶面生长种子层250。因此，缩小不同晶面种子层250生长速率的差异，进一步增加凹槽241的底部和侧壁交界的拐角处表面形成种子层250的几率。
在另一个实施例中，所述半导体器件的类型为N型，所述种子层的材料为硅；形成所述种子层的工艺为外延生长工艺，参数包括：采用的气体包括SiH2Cl2和HCl，SiH2Cl2的流量为100sccm～200sccm，HCl的流量为50sccm～100sccm，温度为700摄氏度～750摄氏度，腔室压强为100torr～200torr。
在上述形成种子层250的外延生长工艺中，SiH2Cl2和HCl的流量相对与现有采用的流量均较大，在反应气体优先满足(100)晶面，其次满足(110)晶面生长种子层250的情况下，还有较充足的反应气体能满足(111)晶面生长种子层250。因此，缩小不同晶面种子层250生长速率的差异，进一步增加凹槽241的底部和侧壁交界的拐角处表面形成种子层250的几率。
本实施例中，所述凹槽241底部种子层250的平均厚度大于所述凹槽241侧壁种子层250的平均厚度，原因为：种子层250生长时，种子层250在(100)晶面法线方向生长最快。
所述凹槽241底部种子层250的平均厚度大于所述凹槽241侧壁种子层250的平均厚度，好处包括：凹槽241侧壁种子层250厚度较薄，减小后续源漏体层与沟道的距离，使源漏体层能将应力充分施加到沟道，提高沟道中载流子迁移率，从而提高半导体器件的性；凹槽241底部种子层250厚度较大，减小后续源漏体层在垂直于半导体衬底201表面方向上的尺寸，有利于保持源漏体层对沟道的应力，防止弛豫。
本实施例中，所述凹槽241底部种子层250的平均厚度为10nm～16nm，所述凹槽241侧壁的种子层250的平均厚度为6nm～8nm。
参考图8，在所述凹槽241中形成位于种子层250表面的源漏体层260。
所述源漏体层260中掺杂有导电离子。
当所述半导体器件的类型为N型时，所述源漏体层260的材料为具有导电离子的硅或碳硅或锗硅，所述导电离子的导电类型为N型，如磷离子。当所述半导体器件的类型为P型时，所述源漏体层260的材料为具有导电离子的锗硅，所述导电离子的导电类型为P型，如硼离子。
当种子层250的材料为具有导电离子的锗硅，所述源漏体层260的材料为具有导电离子的锗硅时，所述源漏体层260中锗离子的浓度大于所述种子层250中锗离子的浓度。
形成所述源漏体层260的工艺为外延生长工艺。
由于在种子层250厚度一定的情况下，种子层250覆盖凹槽241的全部内壁，而所述种子层250作为源漏体层260生长的过渡缓冲层，因此形成源漏体层260的过程中，避免源漏体层260在部分凹槽241内壁表面进行生长，源漏体层260仅在种子层250表面进行生长。进而使凹槽241的底部和侧壁交界的拐角处的源漏体层260的晶格缺陷较少，提高了源漏体层260的质量，提高了半导体器件的性能。
具体的，源漏体层260的质量得到提高，对半导体器件的电学性能的好处包括：源漏体层260对沟道的应力提高，有效的提高沟道载流子迁移率，有效的提高半导体器件的驱动电流；另外，提高了半导体器件的良率。
在一个实施例中，所述种子层250中导电离子的浓度为4E18atoms/cm3～6E18atoms/cm3，如5E18atoms/cm3，所述源漏体层260中导电离子的浓度为2E20atoms/cm3～3E20atms/cm3。
需要说明的是，形成源漏体层的外延生长工艺中，采用的气体包括HCl，HCl用于实现源漏体层的选择性生长。
现有技术中，种子层在拐角处不能生长，那么源漏体层从拐角处的缺陷累积延伸至源漏体层的顶部表面，源漏体层顶部的质量较差，容易被形成源漏体层过程中的HCl刻蚀，因此源漏体层顶部表面容易向内凹陷。
然而，本实施例中，由于源漏体层260均在种子层250表面进行生长，源漏体层260底部至顶部的质量均较好，因此在源漏体层260形成过程中，源漏体层260顶部材料不会被HCl较大的刻蚀，因此避免源漏体层260顶部表面向内凹陷。这样，使得源漏体层260对沟道的应力增加。
本实施例中，还包括：形成所述源漏体层260后，在基底200、隔离结构、种子层250和源漏体层260上形成底层介质层，底层介质层覆盖栅极结构210的侧壁；在形成底层介质层的过程中去除顶保护层220，暴露出栅极结构210的顶部表面；形成底层介质层后，去除栅极结构，在底层介质层中形成栅开口；在栅开口中形成金属栅极结构。
相应的，本实施例还提供一种采用上述方法形成的半导体器件，请参考图8，包括：基底200；位于所述基底200上的栅极结构210；分别位于所述栅极结构210两侧基底200中的凹槽241(参考图6)，所述凹槽241的底部表面和侧壁之间的拐角处呈圆角；位于所述凹槽241内壁的种子层250，且所述种子层250覆盖凹槽241的全部内壁；在所述凹槽241中且位于种子层250表面的源漏体层260。
本实施例中，所述半导体衬底201上还具有隔离结构，所述隔离结构覆盖鳍部202的部分侧壁表面。所述隔离结构的表面低于所述鳍部202的顶部表面。所述隔离结构的材料包括氧化硅。
本实施例中，还包括：位于所述栅极结构210的侧壁的侧墙230。
所述凹槽241分别位于所述栅极结构210和侧墙230两侧的基底200中。
本实施例中，所述种子层250和所述源漏体层260中均掺杂有导电离子，所述种子层250中导电离子的浓度小于所述源漏体层260中导电离子的浓度。
在其它实施例中，种子层250中没有导电离子。
当所述半导体器件的类型为N型时，所述种子层250的材料为具有导电离子的硅或碳硅；所述源漏体层260的材料为具有导电离子的硅或碳硅；所述导电离子的导电类型为N型。
当所述半导体器件的类型为P型时，所述种子层250的材料为具有导电离子的锗硅；所述源漏体层260的材料为具有导电离子的锗硅，且所述源漏体层260中锗离子的浓度大于所述种子层250中锗离子的浓度；所述导电离子的导电类型为P型。
所述种子层250中导电离子的浓度为所述源漏体层260中导电离子浓度的1％～5％。
所述凹槽241底部种子层250的平均厚度大于所述凹槽241侧壁种子层250的平均厚度。
所述凹槽241底部的种子层250的平均厚度为10nm～16nm，所述凹槽241侧壁的种子层250的平均厚度为6nm～8nm。
虽然本发明披露如上，但本发明并非限定于此。任何本领域技术人员，在不脱离本发明的精神和范围内，均可作各种更动与修改，因此本发明的保护范围应当以权利要求所限定的范围为准。

Claims (19)

1.一种半导体器件的形成方法，其特征在于，包括：
提供基底，所述基底上具有栅极结构；
在所述栅极结构两侧的基底中分别形成初始槽；
对所述初始槽的内壁进行表面圆滑处理，使初始槽形成凹槽，所述凹槽的底部表面和侧壁之间的拐角处呈圆角，所述表面圆滑处理的工艺包括退火处理；
在所述凹槽的内壁形成种子层，且所述种子层覆盖凹槽的全部内壁；
在所述凹槽中形成位于种子层表面的源漏体层。
2.根据权利要求1所述的半导体器件的形成方法，其特征在于，所述退火处理包括尖峰退火。
3.根据权利要求1所述的半导体器件的形成方法，其特征在于，所述退火处理的参数包括：采用的气体为N2和H2中的一种或二者的结合，退火温度为800摄氏度～1000摄氏度，退火压力为5torr～50torr。
4.根据权利要求1所述的半导体器件的形成方法，其特征在于，所述种子层和所述源漏体层中均掺杂有导电离子，所述种子层中导电离子的浓度小于所述源漏体层中导电离子的浓度。
5.根据权利要求4所述的半导体器件的形成方法，其特征在于，当所述半导体器件的类型为N型时，所述种子层的材料为具有导电离子的硅或碳硅；所述源漏体层的材料为具有导电离子的硅或碳硅；所述导电离子的导电类型为N型。
6.根据权利要求4所述的半导体器件的形成方法，其特征在于，当所述半导体器件的类型为P型时，所述种子层的材料为具有导电离子的锗硅；所述源漏体层的材料为具有导电离子的锗硅，且所述源漏体层中锗离子的浓度大于所述种子层中锗离子的浓度；所述导电离子的导电类型为P型。
7.根据权利要求4所述的半导体器件的形成方法，其特征在于，所述种子层中导电离子的浓度为所述源漏体层中导电离子浓度的1％～5％。
8.根据权利要求4所述的半导体器件的形成方法，其特征在于，所述种子层的材料为具有导电离子的锗硅，所述导电离子为硼离子；形成所述种子层的工艺为外延生长工艺，参数包括：采用的气体包括SiH2Cl2、GeH4、B2H6和HCl，SiH2Cl2的流量为100sccm～200sccm，GeH4的流量为8sccm～21sccm，B2H6的流量为15sccm～50sccm，HCl的流量为50sccm～100sccm，温度为660摄氏度～680摄氏度，腔室压强为100torr～200torr。
9.根据权利要求1所述的半导体器件的形成方法，其特征在于，所述半导体器件的类型为N型，所述种子层的材料为硅；形成所述种子层的工艺为外延生长工艺，参数包括：采用的气体包括SiH2Cl2和HCl，SiH2Cl2的流量为100sccm～200sccm，HCl的流量为50sccm～100sccm，温度为700摄氏度～750摄氏度，腔室压强为100torr～200torr。
10.根据权利要求1所述的半导体器件的形成方法，其特征在于，所述凹槽底部种子层的平均厚度大于所述凹槽侧壁种子层的平均厚度。
11.根据权利要求10所述的半导体器件的形成方法，其特征在于，所述凹槽底部的种子层的平均厚度为10nm～16nm，所述凹槽侧壁的种子层的平均厚度为6nm～8nm。
12.根据权利要求1所述的半导体器件的形成方法，其特征在于，形成所述源漏体层的工艺为外延生长工艺。
13.一种半导体器件，其特征在于，所述半导体器件由权利要求1～12中任一项所述的形成方法形成，包括：
基底；
位于所述基底上的栅极结构；
分别位于所述栅极结构两侧基底中的凹槽，所述凹槽的底部表面和侧壁之间的拐角处呈圆角；
位于所述凹槽内壁的种子层，且所述种子层覆盖凹槽的全部内壁；
在所述凹槽中且位于种子层表面的源漏体层。
14.根据权利要求13所述的半导体器件，其特征在于，所述种子层和所述源漏体层中均掺杂有导电离子，所述种子层中导电离子的浓度小于所述源漏体层中导电离子的浓度。
15.根据权利要求14所述的半导体器件，其特征在于，当所述半导体器件的类型为N型时，所述种子层的材料为具有导电离子的硅或碳硅；所述源漏体层的材料为具有导电离子的硅或碳硅；所述导电离子的导电类型为N型。
16.根据权利要求14所述的半导体器件，其特征在于，当所述半导体器件的类型为P型时，所述种子层的材料为具有导电离子的锗硅；所述源漏体层的材料为具有导电离子的锗硅，且所述源漏体层中锗离子的浓度大于所述种子层中锗离子的浓度；所述导电离子的导电类型为P型。
17.根据权利要求14所述的半导体器件，其特征在于，所述种子层中导电离子的浓度为所述源漏体层中导电离子浓度的1％～5％。
18.根据权利要求13所述的半导体器件，其特征在于，所述凹槽底部种子层的平均厚度大于所述凹槽侧壁种子层的平均厚度。
19.根据权利要求18所述的半导体器件，其特征在于，所述凹槽底部的种子层的平均厚度为10nm～16nm，所述凹槽侧壁的种子层的平均厚度为6nm～8nm。
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