CN112385033A - 半导体装置 - Google Patents

半导体装置 Download PDF

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CN112385033A
CN112385033A CN201880095470.7A CN201880095470A CN112385033A CN 112385033 A CN112385033 A CN 112385033A CN 201880095470 A CN201880095470 A CN 201880095470A CN 112385033 A CN112385033 A CN 112385033A
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sealing material
active region
transistor chip
semiconductor device
thermal conductivity
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冈崎拓行
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Abstract

晶体管芯片(2)具有有源区(7)。第1密封材料(5)不覆盖有源区(7)的外周部，而覆盖有源区(7)的中央部。第2密封材料(6)覆盖有源区(7)的外周部。第1密封材料(5)的导热系数大于第2密封材料(6)的导热系数。第2密封材料(6)的介电常数小于第1密封材料(5)的介电常数。

Description

半导体装置
技术领域
本发明涉及通过密封材料覆盖晶体管芯片的半导体装置。
背景技术
在半导体装置中，为了不使晶体管和MMIC的特性降低，并且确保可靠性，从而采用陶瓷封装或者多层布线构造。但是，陶瓷封装的工序成本及部件成本昂贵。另外，为了廉价地制成元件而存在采用模制封装的情况(例如，参照专利文献1)。在现有的模制封装中，通过耐热性及耐湿性较高的密封材料来覆盖晶体管芯片的整个区域。
专利文献1：日本特开2017-168486号公报
如果为了使散热性提高而采用导热系数较大的密封材料，则存在源极漏极间电容Cds增加且效率或者增益等高频特性降低的问题。另一方面，如果为了抑制高频特性的降低而采用介电常数较小的密封材料，那么存在散热性降低而无法确保可靠性的问题。
发明内容
本发明为了解决上述的课题而完成，其目的在于获得能够确保可靠性并且抑制高频特性的降低的半导体装置。
本发明所涉及的半导体装置的特征在于，具备：晶体管芯片，其具有有源区；第1密封材料，其不覆盖上述有源区的外周部，而覆盖上述有源区的中央部；以及第2密封材料，其覆盖上述有源区的上述外周部，上述第1密封材料的导热系数大于上述第2密封材料的导热系数，上述第2密封材料的介电常数小于上述第1密封材料的介电常数。
在本发明中，通过导热系数较大的第1密封材料覆盖作为发热集中部位的晶体管芯片的有源区的中央部。由此，散热性提高，从而能够确保可靠性。另外，温度相对较低的有源区的外周部不通过介电常数较大的第1密封材料覆盖，而通过介电常数较小的第2密封材料覆盖。由此，能够抑制源极漏极间电容，从而能够抑制高频特性的降低。
附图说明
图1是表示实施方式1所涉及的半导体装置的剖视图。
图2是表示晶体管芯片的俯视图。
图3是表示晶体管芯片的有源区的俯视图。
图4是表示实施方式1所涉及的晶体管芯片的密封状态的俯视图。
图5是表示实施方式1所涉及的晶体管芯片的有源区的密封状态的俯视图。
图6是表示实施方式2所涉及的晶体管芯片的有源区的密封状态的剖视图。
图7是表示实施方式2所涉及的晶体管芯片的有源区的密封状态的俯视图。
图8是表示实施方式3所涉及的晶体管芯片的有源区的密封状态的剖视图。
图9是表示实施方式3所涉及的晶体管芯片的有源区的密封状态的俯视图。
具体实施方式
参照附图对实施方式所涉及的半导体装置进行说明。存在对相同的或者对应的结构要素标注相同的附图标记，并省略重复说明的情况。
实施方式1.
图1是表示实施方式1所涉及的半导体装置的剖视图。在基板1之上以倒装式安装有晶体管芯片2。晶体管芯片2是高频特性·高散热优异的氮化镓系HEMT等场效应晶体管。在晶体管芯片2的上方配置有包含Cu或者Au等的散热性高的散热基板3。晶体管芯片2和散热基板3通过Au凸块4电连接。此外，在不采用倒装式安装的情况下，也可以取代Au凸块4而采用引线接合。
在基板1与散热基板3之间，晶体管芯片2的中央部通过第1密封材料5而被密封，除此之外的区域通过第2密封材料6而被密封。第1密封材料5的导热系数大于第2密封材料6的导热系数。第2密封材料6的介电常数小于第1密封材料5的介电常数。
第1密封材料5和第2密封材料6并不局限于树脂，也可以是绝缘膜等。例如，第1密封材料5是模制树脂(导热系数：约4F/m，介电常数：约0.8W/mK)等。第2密封材料6是聚酰亚胺(导热系数：约2F/m，介电常数：约0.18W/mK)等。此外，模制树脂一般是组合二氧化硅填料、环氧树脂以及固化剂而制成的密封材料。约75％由二氧化硅填料构成，不过作为模制树脂的性质则根据约占20％的环氧树脂的种类而改变。环氧树脂的种类具有多种，例如有OCN型、联苯型以及多功能型等。
在晶体管芯片2工作时产生的热从晶体管芯片2的上表面侧经由散热基板3被散热。基板1是通过芯片焊接等被接合在晶体管芯片2的下表面的PKG基板。基板1也可以是与散热基板3相同的基板，优选为散热性高的基板。
图2是表示晶体管芯片的俯视图。晶体管芯片2具有有源区7、栅极焊盘8、源极焊盘9以及漏极焊盘10。栅极焊盘8、源极焊盘9以及漏极焊盘10中的至少1个通过Au凸块4与散热基板3连接。连接哪个焊盘根据顾客要求等而改变。
图3是表示晶体管芯片的有源区的俯视图。交互地配置有多个源电极11和多个漏电极12，在他们之间配置有多个栅电极13。栅电极13与栅极焊盘8连接。源电极11与源极焊盘9连接。漏电极12与漏极焊盘10连接。
图4是表示实施方式1所涉及的晶体管芯片的密封状态的俯视图。图5是表示实施方式1所涉及的晶体管芯片的有源区的密封状态的俯视图。晶体管芯片2的热分布从有源区的中心呈圆形地扩展。因此，通过导热系数较大的第1密封材料5覆盖有源区7的中央部。有源区7的外周部通过介电常数较小的第2密封材料6覆盖。
例如，第1密封材料5和第2密封材料6能够在PKG安装时进行涂覆。首先，在有源区7的中央部呈圆形状地涂覆第1密封材料5。这样的涂覆能够容易地实施，也能够手动实施。接下来，使晶体管芯片2和散热基板3通过Au凸块4进行结合。接下来，通过第2密封材料6填满晶体管芯片2的整个区域。
或者，也可以在晶片工序中通过转印工序涂覆第1密封材料5和第2密封材料6。转印工序是采用掩模的照片制版工序。具体而言，首先在晶片整个表面涂覆树脂后，涂覆抗蚀剂。接下来，采用掩模将不需要树脂的部位的抗蚀剂开口。接下来，将抗蚀剂作为掩模将树脂通过湿式蚀刻或者干式蚀刻刻画图案。最后，去除抗蚀剂。在本实施方式中仅在有源区7的中央部呈圆形状地涂覆第1密封材料5，因此使用分辨率不高的单纯的掩模即可，能够通过对准精度较低的简单的转印工序实施。
如以上说明，在本实施方式中，通过导热系数较大的第1密封材料5覆盖作为发热集中部位的晶体管芯片2的有源区的中央部。由此，散热性提高，因此能够确保可靠性。另外，温度相对较低的有源区的外周部不通过介电常数较大的第1密封材料5覆盖，而通过介电常数较小的第2密封材料6覆盖。由此，能够抑制源极漏极间电容Cds，从而能够抑制高频特性的降低。
另外，第1密封材料5和第2密封材料6的涂覆既可以在PKG安装时实施，也可以在晶片工序中实施。在任何情况下都能够不采用复杂的图案而通过现有的工序容易地涂覆第1密封材料5和第2密封材料6。
在第1密封材料5和第2密封材料6之上设置有散热基板3，因此不仅从装置的下表面侧散热，也从上表面侧进行散热。另外，第1密封材料5与散热基板3接触，因此从晶体管芯片2向散热基板3进行散热的散热性提高。另外，晶体管芯片2与散热基板3经由Au凸块4连接，因此也能够经由Au凸块4进行散热。
实施方式2.
图6是表示实施方式2所涉及的晶体管芯片的有源区的密封状态的剖视图。图7是表示实施方式2所涉及的晶体管芯片的有源区的密封状态的俯视图。通过以介电常数较小的第2密封材料6覆盖被认为最有助于源极漏极间电容Cds的增加的栅电极13的周边，由此能够抑制高频特性的降低。另外，通过以导热系数较大的第1密封材料5覆盖面积较大的作为欧姆电极的源电极11和漏电极12的周边，由此散热性提高，从而能够确保可靠性。其他的结构与实施方式1相同。
实施方式3.
图8是表示实施方式3所涉及的晶体管芯片的有源区的密封状态的剖视图。图9是表示实施方式3所涉及的晶体管芯片的有源区的密封状态的俯视图。通过以导热系数较大的第1密封材料5覆盖作为发热源的栅电极13的周边，由此散热性提高，从而能够确保可靠性。另外，通过以介电常数较小的第2密封材料6覆盖源电极11和漏电极12的周边，由此能够抑制源极漏极间电容Cds，从而能够抑制高频特性的降低。其他的结构与实施方式1相同。
此外，实施方式2、3的第1密封材料5和第2密封材料6难以在PKG安装时选择性地涂覆。因此，在晶片工序中追加1个或者2个转印工序来涂覆第1密封材料5和第2密封材料6。
附图标记说明
2…晶体管芯片；3…散热基板；4…Au凸块；5…第1密封材料；6…第2密封材料；7…有源区；11…源电极；12…漏电极；13…栅电极。

Claims (6)

1.一种半导体装置，其特征在于，具备：
晶体管芯片，其具有有源区；
第1密封材料，其不覆盖所述有源区的外周部，而覆盖所述有源区的中央部；以及
第2密封材料，其覆盖所述有源区的所述外周部，
所述第1密封材料的导热系数大于所述第2密封材料的导热系数，
所述第2密封材料的介电常数小于所述第1密封材料的介电常数。
2.一种半导体装置，其特征在于，具备：
晶体管芯片，其具有栅电极、源电极以及漏电极；
第1密封材料，其覆盖所述源电极和所述漏电极的周边；以及
第2密封材料，其覆盖所述栅电极的周边，
所述第1密封材料的导热系数大于所述第2密封材料的导热系数，
所述第2密封材料的介电常数小于所述第1密封材料的介电常数。
3.一种半导体装置，其特征在于，具备：
晶体管芯片，其具有栅电极、源电极以及漏电极；
第1密封材料，其覆盖所述栅电极的周边；以及
第2密封材料，其覆盖所述源电极和所述漏电极的周边，
所述第1密封材料的导热系数大于所述第2密封材料的导热系数，
所述第2密封材料的介电常数小于所述第1密封材料的介电常数。
4.根据权利要求1～3中任一项所述的半导体装置，其特征在于，
还具备在所述第1和第2密封材料之上设置的散热基板。
5.根据权利要求4所述的半导体装置，其特征在于，
所述第1密封材料与所述散热基板接触。
6.根据权利要求4或5所述的半导体装置，其特征在于，
所述晶体管芯片经由凸块与所述散热基板电连接。
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