TWI668819B - Semiconductor device - Google Patents

Semiconductor device Download PDF

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TWI668819B
TWI668819B TW107140816A TW107140816A TWI668819B TW I668819 B TWI668819 B TW I668819B TW 107140816 A TW107140816 A TW 107140816A TW 107140816 A TW107140816 A TW 107140816A TW I668819 B TWI668819 B TW I668819B
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sealing material
semiconductor device
transistor wafer
electrode
thermal conductivity
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TW107140816A
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TW202006903A (zh
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岡崎拓行
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日商三菱電機股份有限公司
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Abstract

電晶體晶片(2)係具有主動區域(7)。第1密封材(5)不覆蓋主動區域(7)的外周部而覆蓋主動區域(7)的中央部。第2密封材(6)覆蓋主動區域(7)的外周部。第1密封材(5)的熱傳導率係大於第2密封材(6)的熱傳導率。第2密封材(6)的介電率係小於第1密封材(5)的介電率。

Description

半導體裝置
本發明係關於以密封材覆蓋電晶體晶片的半導體裝置。
在半導體裝置中，使用陶瓷封裝體或多層配線構造，俾以不會使電晶體及MMIC的特性降低，而且確保可靠性。但是，陶瓷封裝體係製程成本與構件成本昂貴。此外，為了廉價製作元件，有使用模製封裝體的情形(參照例如專利文獻1)。在習知之模製封裝體中，係以耐熱性及耐濕性高的密封材覆蓋電晶體晶片全區域。
先前技術文獻
專利文獻
專利文獻1：日本特開2017-168486號公報
若為了使放熱性提升而使用熱傳導率大的密封材時，有源極汲極間電容Cds增加而效率或增益等高頻特性降低的問題。另一方面，若為了抑制高頻特性降低而使用介電率小的密封材時，有放熱性降低，且無法確保可靠性的問題。
本發明係為解決如上所述之課題而完成者，其目的在獲得一種可一邊確保可靠性一邊抑制高頻特性降低的半導體裝置。
本發明之半導體裝置之特徵為：包括：具有主動區域的電晶體晶片；不覆蓋前述主動區域的外周部而覆蓋前述主動區域的中央部的第1密封材；及覆蓋前述主動區域的前述外周部的第2密封材，前述第1密封材的熱傳導率係大於前述第2密封材的熱傳導率，前述第2密封材的介電率係小於前述第1密封材的介電率。
在本發明中，以熱傳導率大的第1密封材覆蓋作為發熱集中部位的電晶體晶片的主動區域的中央部。藉此，由於放熱性提升，因此可確保可靠性。此外，相對溫度較低的主動區域的外周部係不以介電率大的第1密封材覆蓋，而以介電率小的第2密封材覆蓋。藉此，可抑制源極汲極間電容，因此可抑制高頻特性降低。
1‧‧‧基板
2‧‧‧電晶體晶片
3‧‧‧放熱基板
4‧‧‧Au凸塊
5‧‧‧第1密封材
6‧‧‧第2密封材
7‧‧‧主動區域
8‧‧‧閘極焊墊
9‧‧‧源極焊墊
10‧‧‧汲極焊墊
11‧‧‧源極電極
12‧‧‧汲極電極
13‧‧‧閘極電極
〔圖1〕係顯示實施形態1之半導體裝置的剖面圖。
〔圖2〕係顯示電晶體晶片的上面圖。
〔圖3〕係顯示電晶體晶片的主動區域的上面圖。
〔圖4〕係顯示實施形態1之電晶體晶片的密封狀態的上面圖。
〔圖5〕係顯示實施形態1之電晶體晶片的主動區域的密封狀態的上面圖。
〔圖6〕係顯示實施形態2之電晶體晶片的主動區域的密封狀態的剖面圖。
〔圖7〕係顯示實施形態2之電晶體晶片的主動區域的密封狀態的上面圖。
〔圖8〕係顯示實施形態3之電晶體晶片的主動區域的密封狀態的剖面圖。
〔圖9〕係顯示實施形態3之電晶體晶片的主動區域的密封狀態的上面圖。
參照圖示，說明實施形態之半導體裝置。對於相同或對應的構成要素，係標註相同符號，且有省略反覆說明的情形。
實施形態1.
圖1係顯示實施形態1之半導體裝置的剖面圖。在基板1之上覆晶構裝有電晶體晶片2。電晶體晶片2係高頻特性/高放熱優異的氮化鎵系HEMT等場效電晶體。在電晶體晶片2的上方配置有含有Cu或Au等之放熱性高的放熱基板3。電晶體晶片2與放熱基板3係藉由Au凸塊4作電性連接。其中，若不使用覆晶構裝，亦可使用打線接合來取代Au凸塊4。
在基板1與放熱基板3之間，以第1密封材5密封電晶體晶片2的中央部，以第2密封材6密封除此之外的區域。第1密封材5的熱傳導率係大於第2密封材6的熱傳導率。第2密封材6的介電率係小於第1密封材5的介電率。
第1密封材5及第2密封材6亦可為絕緣膜等，而非侷限於樹脂。例如，第1密封材5係壓模樹脂(熱傳導率：約4F/m、介電率：約0.8W/mK)等。第2密封材6係聚醯亞胺(熱傳導率：約2F/m、介電率：約0.18W/mK)等。其中，一般而言，壓模樹脂係將氧化矽填料、環氧樹脂、硬化劑組合而作成的密封材。約75%由氧化矽填料構成，作為壓模樹脂的性質依佔有約20%的環氧樹脂的種類而改變。環氧樹脂的種類有各式各樣，有例如OCN型、聯苯型、多官能型等。
電晶體晶片2動作時所發生的熱係由電晶體晶片2的上面側透過放熱基板3被放熱。基板1係以晶粒接合等被接合在電晶體晶片2的下面的PKG基板。基板1亦可為與放熱基板3同樣的基板，以放熱性高為宜。
圖2係顯示電晶體晶片的上面圖。電晶體晶片2係具有：主動區域 7、閘極焊墊8、源極焊墊9、及汲極焊墊10。閘極焊墊8、源極焊墊9、及汲極焊墊10的至少1個藉由Au凸塊4而被連接在放熱基板3。連接哪個焊墊係依顧客要求等而改變。
圖3係顯示電晶體晶片的主動區域的上面圖。交替配置複數源極電極11與複數汲極電極12，在該等之間配置有複數閘極電極13。閘極電極13係連接於閘極焊墊8。源極電極11係連接於源極焊墊9。汲極電極12係連接於汲極焊墊10。
圖4係顯示實施形態1之電晶體晶片的密封狀態的上面圖。圖5係顯示實施形態1之電晶體晶片的主動區域的密封狀態的上面圖。電晶體晶片2的熱分布係由主動區域的中心以圓形擴展。因此，以熱傳導率大的第1密封材5覆蓋主動區域7的中央部。主動區域7的外周部係以介電率小的第2密封材6覆蓋。
例如，第1密封材5及第2密封材6係可在PKG構裝時塗布。首先，將第1密封材5以圓形狀塗布在主動區域7的中央部。如上所示之塗布係可輕易實施，亦可以手動實施。接著，使電晶體晶片2與放熱基板3藉由Au凸塊4而相結合。接著，以填埋電晶體晶片2全域的方式以第2密封材6填滿。
或者，亦可在晶圓製程中，藉由轉印工序來塗布第1密封材5及第2密封材6。轉印工序係使用遮罩的照相製版工序。具體而言，首先在晶圓全面塗布樹脂之後，塗布阻劑。接著，使用遮罩，將樹脂不要部位的阻劑形成開口。接著，將阻劑作為遮罩，將樹脂藉由濕式蝕刻或乾式蝕刻進行圖案化。最後將阻劑去除。在本實施形態中係僅將第1密封材5以圓形狀塗布在主動區域7的中央部，因此若使用解像度不高之單純的遮罩即可，可在對合精度亦低且簡單的轉印製程中實施。
如以上說明所示，在本實施形態中，以熱傳導率大的第1密封材5覆蓋作為發熱集中部位的電晶體晶片2的主動區域的中央部。藉此，由於放熱性 提升，因此可確保可靠性。此外，相對溫度較低的主動區域的外周部係未以介電率大的第1密封材5覆蓋，而以介電率小的第2密封材6覆蓋。藉此，可抑制源極汲極間電容Cds，因此可抑制高頻特性降低。
此外，第1密封材5及第2密封材6的塗布可在PKG構裝時、亦可在晶圓製程中進行。在任何情形下，均未使用複雜的圖案，而可以既有的製程輕易塗布第1密封材5及第2密封材6。
放熱基板3被設在第1密封材5及第2密封材6之上，因此不僅裝置的下面側，由上面側亦進行放熱。此外，由於第1密封材5與放熱基板3相接，因此由電晶體晶片2對放熱基板3的放熱性變高。此外，電晶體晶片2係透過Au凸塊4而連接在放熱基板3，因此亦透過Au凸塊4進行放熱。
實施形態2.
圖6係顯示實施形態2之電晶體晶片的主動區域的密封狀態的剖面圖。圖7係顯示實施形態2之電晶體晶片的主動區域的密封狀態的上面圖。藉由以介電率小的第2密封材6覆蓋被認為最有助於源極汲極間電容Cds的增加的閘極電極13的周邊，可抑制高頻特性降低。此外，以熱傳導率大的第1密封材5覆蓋屬於面積大的歐姆電極的源極電極11及汲極電極12的周邊，藉此放熱性提升，因此可確保可靠性。其他構成係與實施形態1相同。
實施形態3.
圖8係顯示實施形態3之電晶體晶片的主動區域的密封狀態的剖面圖。圖9係顯示實施形態3之電晶體晶片的主動區域的密封狀態的上面圖。以熱傳導率大的第1密封材5覆蓋作為發熱源的閘極電極13的周邊，藉此放熱性提升，因此可確保可靠性。此外，以介電率小的第2密封材6覆蓋源極電極11及汲極電極12的周邊，藉此可抑制源極汲極間電容Cds，因此可抑制高頻特性降低。其他構成係與實施形態1相同。
其中，實施形態2、3的第1密封材5及第2密封材6係難以在PKG構裝時選擇性塗布。因此，在晶圓製程中追加1個或2個轉印工序來塗布第1密封材5及第2密封材6。

Claims (6)

  1. 一種半導體裝置，其特徵為包括：具有主動區域的電晶體晶片；不覆蓋前述主動區域的外周部而覆蓋前述主動區域的中央部的第1密封材；及覆蓋前述主動區域的前述外周部的第2密封材，前述第1密封材的熱傳導率係大於前述第2密封材的熱傳導率，前述第2密封材的介電率係小於前述第1密封材的介電率。
  2. 一種半導體裝置，其特徵為包括：具有閘極電極、源極電極、及汲極電極的電晶體晶片；覆蓋前述源極電極及前述汲極電極的周邊的第1密封材；及覆蓋前述閘極電極的周邊的第2密封材，前述第1密封材的熱傳導率係大於前述第2密封材的熱傳導率，前述第2密封材的介電率係小於前述第1密封材的介電率。
  3. 一種半導體裝置，其特徵為包括：具有閘極電極、源極電極、及汲極電極的電晶體晶片；覆蓋前述閘極電極的周邊的第1密封材；及覆蓋前述源極電極及前述汲極電極的周邊的第2密封材，前述第1密封材的熱傳導率係大於前述第2密封材的熱傳導率，前述第2密封材的介電率係小於前述第1密封材的介電率。
  4. 如申請專利範圍第1至3項中任一項之半導體裝置，其中，另外包括：設在前述第1及第2密封材之上的放熱基板。
  5. 如申請專利範圍第4項之半導體裝置，其中，前述第1密封材係與前述放熱基板相接。
  6. 如申請專利範圍第4項之半導體裝置，其中，前述電晶體晶片係透過凸塊而與前述放熱基板作電性連接。
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